2019 Ah Sue J. , Brand P. , Falk J. Hasholzner R. , Teich J. Optimizing Exploratory Workflows for Embedded Platform Trace Analysis and its Application to Cellular Modems 21st Int. Conf. on Human-Computer Interaction (Orlando, Florida, USA 26. Juli 2019 - 31. Juli 2019 )In: HCII 2019 Late Breaking Work Papers Proceedings , New York, NY, USA 2019 10.1007/978-3-030-30033-3_10 Download Aliee H. , Khosravi F. , Teich J. Efficient Treatment of Uncertainty in System Reliability Analysis using Importance Measures Dependable Systems and Networks (DSN) (Portland, Oregon, USA 24. Juni 2019 - 27. Juni 2019 )In: The 49th IEEE/IFIP International Conference on Dependable Systems and Networks 2019 10.1109/dsn.2019.00022 Download Bassimir B. Raß A. , Schmitt M. :Theory of particle swarm optimization: A survey of the power of the swarm’s potential it - Information Technology 61 2019 ), S. 169–176 ISSN: 1611-2776 10.1515/itit-2019-0004 Download Bassimir B. Wanka R. Robustness Approaches for the Examination Timetabling Problem under Data Uncertainty 9th Multidisciplinary International Conference on Scheduling: Theory and Applications (Ningbo In: Ruibin Bai, Zhi-Long Chen, Li Jiawei, Graham Kendall, Barry McCollum (Hrsg.): Proc. 9th Multidisciplinary International Conference on Scheduling: Theory and Applications 2019 http://www.schedulingconference.org/proceedings/2019/mista2019.pdf http://www.schedulingconference.org/proceedings/2019/mista2019.pdf Download Becher A. , Herrmann A. , Wildermann S. Teich J. ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) at 18. Fachtagung für "Datenbanksysteme für Business, Technologie und Web" (Universität Rostock 4. März 2019 - 8. März 2019 )In: Gesellschaft für Informatik, Bonn (Hrsg.): Proceedings of the 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) , Bonn 2019 10.18420/btw2019-ws-04 https://dl.gi.de/handle/20.500.12116/21825 Download Becher A. , Teich J. In situ Statistics Generation within partially reconfigurable Hardware Accelerators for Query Processing 15th International Workshop on Data Management on New Hardware (DaMoN)
Held with ACM SIGMOD/PODS 2019 (Amsterdam 1. Juli 2019 - 1. Juli 2019 )10.1145/3329785.3329936 Download Brand M. , Witterauf M. , Hannig F. Teich J. Anytime Instructions for Programmable Accuracy Floating-Point Arithmetic ACM International Conference on Computing Frontiers 2019 (Alghero, Sardinia 30. April 2019 - 2. Mai 2019 )10.1145/3310273.3322833 Download Brand M. , Witterauf M. , Sousa É. , Tanase AP. , Hannig F. Teich J. *-Predictable MPSoC Execution of Real-Time Control Applications Using Invasive Computing Concurrency and Computation-Practice & Experience 2019 )ISSN: 1532-0626 10.1002/cpe.5149 Download Bustio L. , Letras M. , Cumplido R. , Hernández-León R. , Feregrino C. , Bande JM. :Using hashing and lexicographic order for Frequent Itemsets Mining on data streams Journal of Parallel and Distributed Computing 125 2019 ), S. 58-71 ISSN: 0743-7315 10.1016/j.jpdc.2018.11.002. Download Echavarria Gutiérrez JA. , Morales-Reyes A. , Cumplido R. , Salido MÁ. , Feregrino C. :IP-Cores Watermarking Scheme at Behavioral Level Using Genetic Algorithms Engineering Applications of Artificial Intelligence 2019 )ISSN: 0952-1976 Download Fickenscher J. , Hannig F. Teich J. DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs ARCS 2019 - 32nd International Conference on Architecture of Computing Systems (Copenhagen 20. Mai 2019 - 23. Mai 2019 )In: Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck (Hrsg.): Proceedings of the 32nd International Conference on Architecture of Computing Systems (ARCS) 2019 10.1007/978-3-030-18656-2 Download Gabriel D. , Stechele W. , Wildermann S. Resource-aware parameter tuning for real-time applications 32nd International Conference on Architecture of Computing Systems, ARCS 2019 (Copenhagen 20. Mai 2019 - 23. Mai 2019 )In: Martin Schoeberl, Thilo Pionteck, Sascha Uhrig, Jürgen Brehm, Christian Hochberger (Hrsg.): Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2019 10.1007/978-3-030-18656-2_4 Download Groth S. , Schmitt C. , Teich J. Hannig F. SYCL Code Generation for Multigrid Methods 22nd International Workshop on Software and Compilers for Embedded Systems (SCOPES '19) (Sankt Goar, Germany 27. Mai 2019 - 29. Mai 2019 )In: 22nd International Workshop on Software and Compilers for Embedded Systems (SCOPES '19) 2019 10.1145/3323439.3323984 Download Heidorn C. Witterauf M. , Hannig F. Teich J. Efficient Mapping of CNNs onto Tightly Coupled Processor Arrays Journal of Computers 14 2019 ), S. 541-556 ISSN: 1796-203X 10.17706/jcp.14.8.541-556 Download Hochradel K. , Häcker T. , Hohler T. , Becher A. , Wildermann S. Sutor A. :Three-dimensional localization of bats: visual and acoustical IEEE Sensors Journal 2019 ), S. 1-1 ISSN: 1530-437X 10.1109/JSEN.2019.2907399 Download Keszöcze O. , Harris IG. :Chatbot-Based Assertion Generation from Natural Language Specifications Forum on Specification & Design Languages (FDL) (Southampton 2. September 2019 - 4. September 2019 )10.1109/FDL.2019.8876925 Download Khosravi F. :System-Level Reliability Analysis and Optimization in the Presence of Uncertainty 2019 )Download Letras M. , Falk J. Schwarzer T. , Teich J. On the Analytic Evaluation of Schedules via Max-Plus Algebra for DSE of Multi-Core Architectures 22nd International Workshop on Software and Compilers for Embedded Systems, (SCOPES) (Sankt Goar, Germany 27. Mai 2019 - 28. Mai 2019 )In: Proceedings of the 22st International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019, Sankt Goar, Germany 2019 10.1145/3323439.3323979 Download Membarth R. , Dutta H. , Hannig F. Teich J. Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards In: Transactions on High-Performance Embedded Architectures and Compilers V Springer 2019 , S. 1-20 (Lecture Notes in Computer Science (LNCS), Bd.11225)ISBN: 978-3-662-58833-8 10.1007/978-3-662-58834-5_1 Download Mühlenthaler M. , Raß A. :Runtime analysis of discrete particle swarm optimization algorithms: A survey it - Information Technology 61 2019 ), S. 177–185 ISSN: 1611-2776 10.1515/itit-2019-0009 Download Nisar A. , Ah Sue J. , Teich J. Performance Comparison between Machine Learning based LTE Downlink Grant Predictors 21st International Conference on Artificial Intelligence (Las Vegas 29. Juli 2019 - 1. August 2019 )In: Proceedings of the 21st International Conference on Artificial Intelligence 2019 Download Plagwitz P. Streit FJ. , Becher A. , Wildermann S. Teich J. Compiler-Based High-Level Synthesis of Application-Specific Processors on FPGAs International Conference on ReConFigurable Computing and FPGAs (ReConFig) (Cancún, Mexico 9. Dezember 2019 - 11. Dezember 2019 )In: IEEE Proceedings of the 14th International Conference on ReConFigurable Computing and FPGAs 2019 10.1109/ReConFig48160.2019.8994778 Download Pourmohseni B. , Smirnov F. , Khdr H. , Wildermann S. Teich J. Henkel J. :Thermally Composable Hybrid Application Mapping for Real-Time Applications in Heterogeneous Many-Core Systems IEEE Real-Time Systems Symposium (RTSS) (Hong Kong 3. Dezember 2019 - 6. Dezember 2019 )In: Proceedings of the 40th IEEE Real-Time Systems Symposium (RTSS) 2019 10.1109/RTSS46320.2019.00029 Download Pourmohseni B. , Smirnov F. , Wildermann S. Teich J. Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems Euromicro Conference on Real-Time Systems (ECRTS) (Stuttgart, Germany 9. Juli 2019 - 12. Juli 2019 )In: Proceedings of the 31th Euromicro Conference on Real-Time Systems (ECRTS) 2019 10.4230/LIPIcs.ECRTS.2019.12 http://drops.dagstuhl.de/opus/volltexte/2019/10749 Download Pourmohseni B. , Wildermann S. Glaß M. , Teich J. Hard Real-Time Application Mapping Reconfiguration for NoC-Based Many-Core Systems Real-Time Systems 2019 ), S. 1-37 ISSN: 0922-6443 10.1007/s11241-019-09326-y http://link.springer.com/article/10.1007/s11241-019-09326-y Download Qiao B. , Reiche O. , Hannig F. Teich J. From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization 2019 International Symposium on Code Generation and Optimization (CGO) (Washington, DC, USA 16. Februar 2019 - 20. Februar 2019 )In: Proceedings of the 2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO) 2019 10.1109/CGO.2019.8661176 Download Raß A. , Schreiner J. , Wanka R. Runtime Analysis of Discrete Particle Swarm Optimization Applied to Shortest Paths Computation 19th European Conference on Evolutionary Computation in Combinatorial Optimisation (EvoCOP) (Leipzig 24. April 2019 - 26. April 2019 )In: Springer International Publishing (Hrsg.): Evolutionary Computation in Combinatorial Optimization , Cham 2019 10.1007/978-3-030-16711-0_8 Download Roloff S. , Hannig F. Teich J. ActorX10 and Run-Time Application Embedding In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 129-164 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_6 Download Roloff S. , Hannig F. Teich J. Fundamentals In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 9-40 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_2 Download Roloff S. , Hannig F. Teich J. Hybrid Network-on-Chip Simulation In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 77-99 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_4 Download Roloff S. , Hannig F. Teich J. Introduction In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 1-7 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_1 Download Roloff S. , Hannig F. Teich J. InvadeSIM-A Simulation Framework for Invasive Parallel Programs and Architectures In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 41-76 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_3 Download Roloff S. , Hannig F. Teich J. Modeling and Simulation of Invasive Applications and Architectures Singapore Springer 2019 ISBN: 978-981-13-8386-1 10.1007/978-981-13-8387-8 Download Roloff S. , Hannig F. Teich J. Modeling and Simulation of Invasive Applications and Architectures Conclusions and Future Directions In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 165-168 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_7 Download Roloff S. , Hannig F. Teich J. Parallel MPSoC Simulation and Architecture Evaluation In: Sascha Roloff, Frank Hannig, Jürgen Teich (Hrsg.): Modeling and Simulation of Invasive Applications and Architectures 2019 , S. 101-128 (Computer Architecture and Design Methodologies) 10.1007/978-981-13-8387-8_5 Download Schmitt C. :A Domain-Specific Language and Source-to-Source Compilation Framework for Geometric Multigrid Methods 2019 )Download Schwarzer T. , Falk J. Müller S. , Letras M. , Heidorn C. Wildermann S. Teich J. Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization ACM Transactions on Design Automation of Electronic Systems 24 2019 ), Art.Nr.: 29 ISSN: 1084-4309 10.1145/3310249 Download Smirnov F. :Design and Evaluation of Ethernet-based E/E-Architectures for Latency- and Safety-critical Applications 2019 )Download Smirnov F. , Pourmohseni B. , GLAß M. , Teich J. Igor, get me the optimum! Prioritizing important design decisions during the DSE of embedded systems Transactions on Embedded Computing Systems 18 2019 ), Art.Nr.: a78 ISSN: 1558-3465 10.1145/3358204 Download Smirnov F. , Pourmohseni B. , Glaß M. , Teich J. IGOR, get me the Optimum! Prioritizing Important Design Decisions During the DSE of Embedded Systems CODES+ISSS: International Conference on Hardware/Software Codesign
and System Synthesis (New York, NY 13. Oktober 2019 - 18. Oktober 2019 )10.1145/3358204 Download Smirnov F. , Pourmohseni B. , Glaß M. , Teich J. Variety-Aware Routing Encoding for Efficient Design Space Exploration of Automotive Communication Networks 5th International Conference on Vehicle Technology and Intelligent Transport Systems (VEHITS) (Heraklion, Kreta 3. Mai 2019 - 5. Mai 2019 )Download Spieck J. Wildermann S. Schwarzer T. , Teich J. Glaß M. :Data-Driven Scenario-based Application Mapping for Heterogeneous Many-Core Systems IEEE Multicore/Many-core Systems-on-Chip (Singapore 1. Oktober 2019 - 4. Oktober 2019 )In: Multicore/Many-core Systems-on-Chip (MCSoC 2019) 2019 10.1109/MCSoC.2019.00054 Download Teich J. Fummi F. :Conference Reports: Recap of DATE 2019 in Florence, Italy IEEE Design & Test 36 2019 ), S. 59-61 ISSN: 2168-2356 10.1109/MDAT.2019.2915112 Download Teich J. Fummi F. (Hrsg.):Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019 2019 ISBN: 978-3-9819263-2-3 10.1109/MDAT.2019.2915112 Download Tellabi A. , Ruland C. , Waedt K. , Abdelbast S. :Self diagnostics and isolation mechanisms for mixed criticality systems Journal of Communications Software and Systems 15 2019 ), S. 329-335 ISSN: 1845-6421 10.24138/jcomss.v15i4.810 Download Wanka R. Swarm Intelligence it - Information Technology 61 2019 ), S. 157-158 ISSN: 1611-2776 10.1515/itit-2019-0034 Download Witterauf M. , Hannig F. Teich J. Polyhedral Fragments: An Efficient Representation for Symbolically Generating Code for Processor Arrays International Conference on Formal Methods and Models for System Design (MEMOCODE) (San Diego 9. Oktober 2019 - 11. Oktober 2019 )In: Proceedings of the International Conference on Formal Methods and Models for System Design (MEMOCODE) 2019 Download Xu Y. , Schebesch F. , Ravikumar N. , Maier A. :Detection of Unseen Low-Contrast Signals Using Classic and Novel Model Observers Workshop on Bildverarbeitung fur die Medizin, 2019 (Lübeck 17. März 2019 - 19. März 2019 )In: Thomas M. Deserno, Andreas Maier, Christoph Palm, Heinz Handels, Klaus H. Maier-Hein, Thomas Tolxdorff (Hrsg.): Informatik aktuell 2019 10.1007/978-3-658-25326-4_47 Download Özkan MA. , Reiche O. , Qiao B. , Membarth R. , Teich J. Hannig F. Synthesizing High-Performance Image Processing Applications with Hipacc Demo at the University Booth at Design, Automation and Test in Europe (DATE) (Florence 25. März 2019 - 29. März 2019 )https://www12.cs.fau.de/downloads/oezkan/publications/date-ubooth19.pdf Download
2018 Afzal A. , Schmitt C. , Alhaddad S. , Grynko Y. , Teich J. Förstner J. , Hannig F. Solving Maxwell's Equations with Modern C++ and SYCL: A Case Study The 29th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Politecnico di Milano, Milan 10. Juli 2018 - 12. Juli 2018 )In: Proceedings of the 29th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2018 10.1109/ASAP.2018.8445127 https://www12.cs.fau.de/downloads/schmittch/publications/ASAGTFH18asap.pdf Download Ah Sue J. , Brand P. , Brendel J. , Hasholzner R. , Falk J. Teich J. A Predictive Dynamic Power Management for LTE-Advanced Mobile Devices IEEE Wireless Communications and Networking Conference (Barcelona, Catalonia, Spain 15. April 2018 - 18. April 2018 )In: IEEE (Hrsg.): 2018 IEEE Wireless Communications and Networking Conference (WCNC'18) 2018 10.1109/WCNC.2018.8377189 Download Aydin F. , Ugurdag HF. , Leyent VE. , Guzel AE. , Annafianto NFR. , Özkan MA. , Akgun T. , Erbas C. :Rapid Design of Real-Time Image Fusion on FPGA Using HLS and Other Techniques 15th IEEE/ACS International Conference on Computer Systems and Applications (AICCSA) (Aqaba 28. Oktober 2018 - 1. November 2018 )In: 2018 IEEE/ACS 15TH INTERNATIONAL CONFERENCE ON COMPUTER SYSTEMS AND APPLICATIONS (AICCSA) , NEW YORK 2018 10.1109/aiccsa.2018.8612836 Download Bassimir B. Wanka R. Probabilistic Curriculum-based Examination Timetabling 12th International Conference on the Practice and Theory of Automated Timetabling (PATAT) (Vienna In: Edmund K. Burke, Luca Di Gaspero, Barry McCollum, Nysret Musliu, Ender Özcan (Hrsg.): Proc 12th International Conference on the Practice and Theory of Automated Timetabling (PATAT) 2018 http://patatconference.org/patat2018/proceedings/ http://patatconference.org/patat2018/files/proceedings/paper41.pdf Download Becher A. , Beena Gopalakrishnan Nair L. , Broneske D. , Drewes T. , Gurumurthy B. , Meyer-Wegener K. , Pionteck T. , Saake G. , Teich J. Wildermann S. Integration of FPGAs in Database Management Systems: Challenges and Opportunities Datenbank-Spektrum 2018 )ISSN: 1618-2162 10.1007/s13222-018-0294-9 Download Becher A. , Wildermann S. Teich J. Optimistic Regular Expression Matching on FPGAs for Near-Data Processing Data Management on New Hardware (DaMoN) (Houston, Texas 11. Juni 2018 - 11. Juni 2018 )10.1145/3211922.3211926 Download Brand P. , Falk J. Ah Sue J. , Brendel J. , Hasholzner R. , Teich J. Reinforcement Learning for Power-Efficient Grant Prediction in LTE 2018 ), S. 18-26 10.1145/3207719.3207722 Download Echavarria Gutiérrez JA. , Schütz K. , Becher A. , Wildermann S. Teich J. Can Approximate Computing Reduce Power Consumption on FPGAs? 25th IEEE International Conference on Electronics Circuits and Systems (Bordeaux 9. Dezember 2018 - 12. Dezember 2018 )In: Proceedings of IEEE International Conference on Electronics Circuits and Systems 2018 10.1109/icecs.2018.8618062 Download Echavarria Gutiérrez JA. , Schütz K. , Becher A. , Wildermann S. Teich J. Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs AxC18: 3rd Workshop on Approximate Computing (Swissôtel Bremen 31. Mai 2018 - 1. Juni 2018 )https://www12.cs.fau.de/downloads/echavarria/pub/Evaluation_of_Approximate_Computing_Techniques_for_Power_Reduction_on_FPGAs.pdf Download Echavarria Gutiérrez JA. , Wildermann S. Teich J. AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs International Conference on Field Programmable Technology (FPT 2018) (Naha, Okinawa 10. Dezember 2018 - 14. Dezember 2018 )In: Proceedings of 2018 International Conference on Field Programmable Technology 2018 10.1109/fpt.2018.00065 Download Echavarria Gutiérrez JA. , Wildermann S. Teich J. Design Space Exploration of Multi-output Logic Function Approximations International Conference On Computer Aided Design (ICCAD 2018) (San Diego, CA 5. November 2018 - 8. November 2018 )In: Proceedings of the International Conference On Computer Aided Design 2018 10.1145/3240765.3240795 Download Falk J. Neubauer K. , Haubelt C. , Zebelein C. , Teich J. Integrated Modeling Using Finite State Machines and Dataflow Graphs In: Bhattacharyya S., Deprettere E., Leupers R., Takala J. (Hrsg.): Handbook of Signal Processing Systems Springer 2018 , S. 825-864 ISBN: 978-3-319-91734-4 10.1007/978-3-319-91734-4_23 Download Fey D. , Hannig F. Special Issue on Heterogeneous Real-Time Image Processing Journal of Real-Time Image Processing 14 2018 ), S. 513-515 ISSN: 1861-8200 10.1007/s11554-018-0763-2 Download Fickenscher J. , Hannig F. Bouzouraa ME. , Teich J. Embedded GPUs in Future Automated Cars Design, Automation and Test in Europe (DATE) (Dresden 19. März 2018 - 23. März 2018 )Download Fickenscher J. , Hannig F. Teich J. Bouzouraa ME. :Base Algorithms of Environment Maps and Efficient Occupancy Grid Mapping on Embedded GPUs 4th International Conference on Vehicle Technology and Intelligent Transport Systems (VEHITS) (Funchal, Madeira, Portugal 16. März 2018 - 18. März 2018 )10.5220/0006677302980306 Download Fickenscher J. , Schlumberger J. , Hannig F. Bouzouraa ME. , Teich J. Cell-based Update Algorithm for Occupancy Grid Maps and new Hybrid Map for ADAS on Embedded GPUs Design, Automation and Test in Europe (DATE) (Dresden, Germany 19. März 2018 - 23. März 2018 )10.23919/DATE.2018.8342050 Download Fickenscher J. , Schmidt S. , Hannig F. Bouzouraa ME. , Teich J. Path Planning for Highly Automated Driving on Embedded GPUs 4 2018 )ISSN: 2079-9268 10.3390/jlpea8040035 Download Henkel J. , Teich J. Wildermann S. Amrouch H. :Dynamic Resource Management for Heterogeneous Many-Cores International Conference On Computer Aided Design (ICCAD 2018) (San Diego, CA 5. November 0018 - 8. November 0018 )In: Proceedings of International Conference On Computer Aided Design 2018 2018 10.1145/3240765.3243471 Download Hochradel K. , Hohler T. , Becher A. , Wildermann S. Sutor A. :Development of a multisensor array for localizing bats in space Journal of Physics: Conference Series 1065 2018 ), S. 072014 ISSN: 1742-6588 10.1088/1742-6596/1065/7/072014 Download Kenter T. , Mahale G. , Alhaddad S. , Grynko Y. , Schmitt C. , Afzal A. , Hannig F. Förstner J. , Plessl C. :OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes The 26th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) (Boulder, CO, USA 29. April 2018 - 1. Mai 2018 )In: Proceedings of the 26th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) 2018 10.1109/FCCM.2018.00037 Download Keszöcze O. , Soeken M. , Drechsler R. :Computational Complexity of Error Metrics in Approximate Computing In: Bernd Steinbach (Hrsg.): Further Improvements in the Boolean Domain 2018 , S. Cambridge Scholars Publishing ISBN: 978-1-5275-0371-7 Download Keszöcze O. , Wille R. , Drechsler R. :Exact Design of Digital Microfluidic Biochips Springer 2018 ISBN: 978-3-319-90936-3 https://www.springer.com/us/book/9783319909356 Download Khosravi F. , Borst M. , Teich J. Probabilistic Dominance in Robust Multi-Objective Optimization IEEE Congress on Evolutionary Computation (CEC) (Barra da Tijuca, Rio de Janeiro 8. Juli 2018 - 13. Juli 2018 )In: IEEE Congress on Evolutionary Computation (CEC) 2018 10.1109/CEC.2018.8477676 https://ieeexplore.ieee.org/abstract/document/8477676 Download Khosravi F. , Müller M. , Glaß M. , Teich J. Simulation-based Uncertainty Correlation Modeling in Reliability Analysis Proceedings of the Institution of Mechanical Engineers, Part O: Journal of Risk and Reliability 232 2018 ), S. 725-737 ISSN: 1748-006X 10.1177/1748006X18758720 https://journals.sagepub.com/doi/abs/10.1177/1748006X18758720 Download Mattauch S. , Lohmann K. , Hannig F. Lohmann D. , Teich J. The Gender Gap in Computer Science --- A Bibliometric Analysis 2018 )ISSN: 2191-5008 10.25593/issn.2191-5008/CS-2018-02 Download Mercader A. , Ah Sue J. , Hasholzner R. , Brendel J. :Improvements in LTE-Advanced Time Series Prediction with Dimensionality Reduction Algorithms IEEE 5G World Forum (Santa Clara, CA 9. Juli 2018 - 11. Juli 2018 )In: IEEE (Hrsg.): Proc. of the IEEE 5G World Forum 2018 10.1109/5gwf.2018.8516973 Download Mitra T. , Teich J. Thiele L. :Guest Editors’ Introduction: Special Issue on Time-Critical Systems Design IEEE Design and Test of Computers 35 2018 ), S. 5-7 ISSN: 0740-7475 10.1109/MDAT.2018.2796037 Download Mitra T. , Teich J. Thiele L. :Guest Editors’ Introduction: Special Issue on Time-Critical Systems Design Part II IEEE Design and Test of Computers 35 2018 ), S. 5 - 6 ISSN: 0740-7475 10.1109/MDAT.2018.2841769 Download Mitra T. , Teich J. Thiele L. :Time-Critical Systems Design: A Survey IEEE Design and Test of Computers 35 2018 ), S. 8-26 ISSN: 0740-7475 10.1109/MDAT.2018.2794204 Download Posewsky T. , Ziener D. :A Flexible FPGA-based Inference Architecture for Pruned Deep Neural Networks International Conference on Architecture of Computing Systems (Braunschweig 9. April 2018 - 12. April 2018 )In: Proceedings of the International Conference on Architecture of Computing Systems 2018 10.1007/978-3-319-77610-1_23 Download Qiao B. , Reiche O. , Hannig F. Teich J. Automatic Kernel Fusion for Image Processing DSLs 21st International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar 28. Mai 2018 - 30. Mai 2018 )In: Proceedings of the 21th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2018 10.1145/3207719.3207723 Download Reiche O. :A Domain-Specific Language Approach for Designing and Programming Heterogeneous Image Systems 2018 )Download Reiche O. , Özkan MA. , Hannig F. Teich J. Schmid M. :Loop Parallelization Techniques for FPGA Accelerator Synthesis Journal of Signal Processing Systems 90 2018 ), S. 3-27 ISSN: 1939-8115 10.1007/s11265-017-1229-7 Download Richthammer V. , Schwarzer T. , Wildermann S. Teich J. Glaß M. :Architecture Decomposition in System Synthesis of Heterogeneous Many-Core Systems 55th ACM/EDAC/IEEE Design Automation Conference (DAC 2018) (San Francisco, CA 24. Juni 2018 - 28. Juni 2018 )10.1109/DAC.2018.8465811 Download Roloff S. :Modeling and Simulation of Invasive Applications and Architectures 2018 )10.1007/978-981-13-8387-8 Download Schmitt C. , Hannig F. Teich J. A Target Platform Description Language for Parallel Code Generation 31st GI/ITG International Conference on Architecture of Computing Systems (ARCS) (Braunschweig 9. April 2018 - 12. April 2018 )In: Workshop Proceedings of the 31st GI/ITG International Conference on Architecture of Computing Systems (ARCS) , Berlin 2018 https://www12.cs.fau.de/downloads/schmittch/publications/SHT18arcs.pdf Download Schmitt C. , Kronawitter S. , Hannig F. Teich J. Lengauer C. :Automating the Development of High-Performance Multigrid Solvers Proceedings of the IEEE 106 2018 ), S. 1969-1984 ISSN: 0018-9219 10.1109/JPROC.2018.2854229 Download Schmitt C. , Schmid M. , Kuckuk S. , Köstler H. , Teich J. Hannig F. Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution Parallel Processing Letters 28 2018 ), Art.Nr.: 1850016 ISSN: 0129-6264 10.1142/S0129626418500160 Download Schwarzer T. , Roloff S. , Richthammer V. , Khaldi R. , Wildermann S. Glaß M. , Teich J. On the Complexity of Mapping Feasibility in Many-Core Architectures Multicore/Many-core Systems-on-Chip (MCSoC-2018) (Hanoi 12. September 2018 - 14. September 2018 )In: Proceedings of Multicore/Many-core Systems-on-Chip (MCSoC-2018) 2018 10.1109/MCSoC2018.2018.00038 Download Schwarzer T. , Weichslgartner A. , Glaß M. , Wildermann S. Brand P. , Teich J. Symmetry-eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37 2018 ), S. 297-310 ISSN: 0278-0070 10.1109/TCAD.2017.2695894 Download Smirnov F. , Reimann F. , Teich J. Glaß M. :Automatic Optimization of the VLAN Partitioning in Automotive Communication Networks ACM Transactions on Design Automation of Electronic Systems 2018 )ISSN: 1084-4309 10.1145/3278120 Download Smirnov F. , Reimann F. , Teich J. Han Z. , Glaß M. :Automatic Optimization of Redundant Message Routings in Automotive Networks 21st International Workshop on Software and Compilers for Embedded Systems (SCOPES 2018) (Sankt Goar 28. Mai 2018 - 30. Mai 2018 )In: ACM (Hrsg.): Proceedings of 21st International Workshop on Software and Compilers for Embedded Systems (SCOPES 2018) 2018 10.1145/3207719.3207725 Download Sousa É. :Memory and Interface Architectures for Invasive Tightly Coupled Processor Arrays 2018 )Download Sousa É. , Witterauf M. , Brand M. , Tanase AP. , Hannig F. Teich J. Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study 29th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Milan, Italy 10. Juli 2018 - 12. Juli 2018 )10.1109/ASAP.2018.8445109 https://ieeexplore.ieee.org/abstract/document/8445109/ Download Streit FJ. , Letras M. , Wildermann S. Hackenberg B. , Falk J. Becher A. , Teich J. Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs International Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancún, Mexico 3. Dezember 2018 - 5. Dezember 2018 )In: IEEE Proceedings of the 13th International Conference on ReConFigurable Computing and FPGAs 2018 10.1109/RECONFIG.2018.8641736 Download Tanase AP. , Hannig F. Teich J. Symbolic Parallelization of Nested Loop Programs Springer 2018 ISBN: 978-3-319-73908-3 10.1007/978-3-319-73909-0 Download Weichslgartner A. , Wildermann S. Gangadharan D. , Glaß M. , Teich J. A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs ACM Transactions on Embedded Computing Systems 2018 )ISSN: 1539-9087 10.1145/3274665 Download Weichslgartner A. , Wildermann S. Glaß M. , Teich J. Invasive Computing for Mapping Parallel Programs to Many-Core Architectures Springer 2018 ISBN: 978-981-10-7355-7 10.1007/978-981-10-7356-4 Download Witterauf M. , Teich J. Run-time Requirement Enforcement for Loop Programs on Processor Arrays 16th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) (Peking 15. Oktober 2018 - 17. Oktober 2018 )In: ACM, IEEE (Hrsg.): Proceedings of the 16th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) 2018 10.1109/MEMCOD.2018.8556911 Download Ziener D. , Pirkl J. , Teich J. Configuration Tempering of BRAM-based AES Implementations on FPGAs 2018 International Conference on Reconfigurable Computing and FPGAs (Cancun 3. Dezember 0018 - 5. Dezember 0018 )In: Proceedings of 2018 International Conference on Reconfigurable Computing and FPGAs 2018 10.1109/reconfig.2018.8641692 Download Özkan MA. , Pérard-Gayot A. , Membarth R. , Slusallek P. , Teich J. Hannig F. A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement International Workshop on FPGAs for Software Programmers (Dublin 31. August 2018 )In: Proceedings of the Fifth International Workshop on FPGAs for Software Programmers 2018 https://www12.cs.fau.de/downloads/oezkan/publications/fsp18.pdf Download
2017 Aliee H. :Reliability Analysis and Optimization of Embedded Systems using Stochastic Logic and Importance Measures 2017 )Download Aliee H. , Banaiyianmofrad A. , Glaß M. , Teich J. Dutt N. :Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'17) (Bremen 8. Februar 2017 - 9. Februar 2017 )In: Proc. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV'17) 2017 Download Aliee H. , Borgonovo E. , Glaß M. , Teich J. On the Boolean Extension of the Birnbaum Importance to Non-Coherent Systems Reliability Engineering & System Safety 160 2017 ), S. 191-200 ISSN: 0951-8320 10.1016/j.ress.2016.12.013 Download Brand M. , Hannig F. Tanase AP. , Teich J. Efficiency in ILP Processing by Using Orthogonality The 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2017) (Seattle 10. Juli 2017 - 12. Juli 2017 )In: IEEE (Hrsg.): 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2017 10.1109/ASAP.2017.7995282 Download Brand M. , Hannig F. Tanase AP. , Teich J. Orthogonal Instruction Processing: An Alternative to Lightweight VLIW Processors IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17) (Korea University, Seoul, Korea 18. September 2017 - 20. September 2017 )In: 2017 IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip 2017 10.1109/MCSoC.2017.17 Download Brand P. , Ah Sue J. , Brendel J. , Falk J. Hasholzner R. , Teich J. Wildermann S. Exploiting Predictability in Dynamic Network Communication for Power-Efficient Data Transmission in LTE Radio Systems 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES’17) (Sankt Goar, Deutschland 12. Juni 2017 - 13. Juni 2017 )In: ACM (Hrsg.): 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES’17) 2017 10.1145/3078659.3078670 Download Bustio L. , Cumplido R. , Hernández-León R. , Bande JM. , Letras M. , Feregrino C. :Approximate Frequent Itemsets Mining on Data Streams Using Hashing and Lexicographic Order in Hardware 8th Latin American Symposium on Circuits and Systems (LASCAS) 10.1109/LASCAS.2017.7948076 Download Echavarria Gutiérrez JA. , Wildermann S. Potwigin E. , Teich J. Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders IEEE Embedded Systems Letters 2017 ), Art.Nr.: 99 ISSN: 1943-0663 10.1109/LES.2017.2760922 Download Falk J. Haubelt C. , Teich J. Zebelein C. :SysteMoC: A Data-Flow Programming Language for Codesign In: Ha S, Teich J (Hrsg.): Handbook of Hardware/Software Codesign Dordrecht, The Netherlands Springer 2017 , S. 59 - 97 ISBN: 978-94-017-7266-2 Download Fickenscher J. , Bouzouraa ME. , Hannig F. Teich J. Environment Mapping Using Massively Parallel Architectures Vehicle Intelligence (München 5. Dezember 2017 - 7. Dezember 2017 )Download Fickenscher J. , Reinhart S. , Bouzouraa ME. , Hannig F. Teich J. Convoy Tracking for ADAS on Embedded GPUs Intelligent Vehicles Symposium (IV 2017) (Redondo Beach, CA, USA 11. Juni 2017 - 14. Juni 2017 )Download Glaß M. , Teich J. Lukasiewycz M. , Reimann F. :Hybrid Optimization Techniques for System-Level Design Space Exploration In: Ha S, Teich J (Hrsg.): Handbook of Hardware/Software Codesign Dordrecht, The Netherlands Springer 2017 , S. 217-246 ISBN: 978-94-017-7266-2 Download Ha S. , Teich J. The Handbook of Hardware/Software Codesign Springer 2017 10.1007/978-94-017-7267-9_4 Download Ha S. , Teich J. Haubelt C. , Glaß M. , Mitra T. , Dömer R. , Eles P. , Shrivastava A. , Gerstlauer A. , Bhattacharyya SS. :Introduction to Hardware/Software Codesign In: Ha S, Teich J (Hrsg.): Handbook of Hardware/Software Codesign Dordrecht, The Netherlands Springer 2017 , S. 3-26 ISBN: 978-94-017-7266-2 10.1007/978-94-017-7267-9 Download Hannig F. Domain-specific and Resource-aware Computing 2017 )10.13140/RG.2.2.23418.13761 https://www.cs12.tf.fau.de/files/2016/08/Frank_Hannig_Habilitation2017.pdf Download Khdr H. , Pagani S. , Rodrigues Sousa E. , Lari V. , Pathania A. , Hannig F. Shafique M. , Teich J. Henkel J. :Power Density-Aware Resource Management for Heterogeneous Tiled Multicores IEEE Transactions on Computers 66 2017 ), S. 488--501 ISSN: 0018-9340 10.1109/TC.2016.2595560 Download Khosravi F. , Aliee H. , Teich J. System-Level Reliability Analysis Considering Imperfect Fault Coverage 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia) (Seoul, Republic of Korea 15. Oktober 2017 - 20. Oktober 2017 )In: 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia) 2017 10.1145/3139315.3141787 Download Khosravi F. , Glaß M. , Teich J. Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures IEEE Transactions on Reliability 66 2017 ), S. 319-338 ISSN: 0018-9529 10.1109/TR.2016.2638320 http://ieeexplore.ieee.org/document/7805166/ Download Kuckuk S. , Leitenmaier L. , Schmitt C. , Schönwetter D. , Köstler H. , Fey D. :Towards Virtual Hardware Prototyping for Generated Geometric Multigrid Solvers CS 2017-01 2017 ), S. 1-8 ISSN: 2191-5008 http://nbn-resolving.de/urn:nbn:de:bvb:29-opus4-83179 http://nbn-resolving.de/urn:nbn:de:bvb:29-opus4-83179 Download Köstler H. , Schmitt C. , Kuckuk S. , Kronawitter S. , Hannig F. Teich J. Rüde U. , Lengauer C. :A Scala Prototype to Generate Multigrid Solver Implementations for Different Problems and Target Multi-Core Platforms International Journal of Computational Science and Engineering 14 2017 ), S. 150-163 ISSN: 1742-7185 10.1504/IJCSE.2017.10003829 Download Letras M. , Falk J. Wildermann S. Teich J. Automatic Conversion of Simulink Models to SysteMoC Actor Networks 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar 12. Juni 2017 - 13. Juni 2017 )10.1145/3078659.3078668 Download Li Z. , Park H. , Malik A. , Wang KI. , Salcic Z. , Kuzmin B. , Glaß M. , Teich J. Using Design Space Exploration for Finding Schedules with Guaranteed Reaction Times of Synchronous Programs on Multi-core Architecture Journal of Systems Architecture 74 2017 ), S. 30-45 ISSN: 1383-7621 Download Mühlenthaler M. , Raß A. , Schmitt M. , Siegling A. , Wanka R. Runtime Analysis of a Discrete Particle Swarm Optimization Algorithm on Sorting and OneMax Conference on Foundations of Genetic Algorithms (FOGA) (Copenhagen, Denmark 12. Januar 2017 - 15. Januar 2017 )In: ACM New York, NY, USA (Hrsg.): Proceedings of the 14th ACM/SIGEVO Conference on Foundations of Genetic Algorithms 2017 10.1145/3040718.3040721 Download Pirkl J. , Becher A. , Echavarria Gutiérrez JA. , Teich J. Wildermann S. Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar 12. Juni 2017 - 13. Juni 2017 )In: Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems 2017 10.1145/3078659.3078669 Download Pourmohseni B. , Glaß M. , Teich J. Automatic Operating Point Distillation for Hybrid Mapping Methodologies Design, Automation & Test in Europe Conference & Exhibition (DATE) (Lausanne 27. März 2017 - 31. März 2017 )In: Proceedings of the 20th Design, Automation & Test in Europe Conference & Exhibition (DATE) 2017 10.23919/DATE.2017.7927160 Download Pourmohseni B. , Wildermann S. Glaß M. , Teich J. Predictable Run-Time Mapping Reconfiguration for Real-Time Applications on Many-Core Systems International Conference on Real-Time Networks and Systems (RTNS) (Grenoble 4. Oktober 2017 - 6. Oktober 2017 )In: Proceedings of the 25th International Conference on Real-Time Networks and Systems (RTNS) 2017 10.1145/3139258.3139278 https://dl.acm.org/authorize?N42087 Download Reiche O. , Kobylko C. , Hannig F. Teich J. Auto-vectorization for Image Processing DSLs 18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES) (Barcelona 21. Juni 2017 - 22. Juni 2017 )In: Proceedings of the 18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES) 2017 10.1145/3078633.3081039 Download Reiche O. , Özkan MA. , Membarth R. , Teich J. Hannig F. Generating FPGA-based Image Processing Accelerators with Hipacc International Conference on Computer Aided Design (ICCAD) (Irvine 13. November 2017 - 16. November 2017 )In: Proceedings of the International Conference on Computer Aided Design (ICCAD) 2017 10.1109/ICCAD.2017.8203894 Download Roloff S. , Hannig F. Teich J. High Performance Network-on-Chip Simulation by Interval-based Timing Predictions 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia) (Seoul, Republic of Korea 15. Oktober 2017 - 20. Oktober 2017 )In: ACM (Hrsg.): Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia) 2017 10.1145/3139315.3139320 Download Rosales R. :Holistic Actor-Oriented Modeling of Embedded Systems for ESL Power Consumption Evaluation 2017 )Download Schmidt B. , Ziener D. , Teich J. Zöllner C. :Optimizing Scrubbing by Netlist Analysis for FPGA Configuration Bit Classification and Floorplanning Integration-The Vlsi Journal 2017 )ISSN: 0167-9260 Download Smirnov F. , Glaß M. , Reimann F. , Teich J. Formal Timing Analysis of Non-Scheduled Traffic in Automotive Scheduled TSN Networks Design, Automation and Test in Europe (DATE) (Lausanne 27. März 2017 - 30. März 2017 )In: Proceedings of Design, Automation and Test in Europe (DATE) 2017 2017 Download Smirnov F. , Glaß M. , Reimann F. , Teich J. Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks 54th ACM/EDAC/IEEE Design Automation Conference (DAC 2017) (Austin 18. Juni 2017 - 22. Juni 2017 )In: Proceedings of 54th ACM/EDAC/IEEE Design Automation Conference (DAC 2017) 2017 10.1145/3061639.3062298 Download Sousa É. , Chakraborty A. , Tanase AP. , Hannig F. Teich J. TCPA Editor: A Design Automation Environment for a Class of Coarse-Grained Reconfigurable Arrays Demo Night at the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancun, Mexico 4. Dezember 2017 - 6. Dezember 2017 )10.1109/RECONFIG.2017.8279818 http://ieeexplore.ieee.org/document/8279818/ Download Sousa É. , Tanase AP. , Hannig F. Teich J. A Reconfigurable Memory Architecture for System Integration of Coarse-Grained Reconfigurable Arrays International Conference on ReConFigurable Computing and FPGA's (ReConFig) (Cancun, Mexico 4. Dezember 2017 - 6. Dezember 2017 )10.1109/RECONFIG.2017.8279768 http://ieeexplore.ieee.org/document/8279768/ Download Streit FJ. , Letras M. , Schid M. , Falk J. Wildermann S. Teich J. High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems International Conference on Distributed Smart Cameras (ICDSC) (Stanford, USA 5. September 2017 - 7. September 2017 )In: ACM Proceedings of the 11th International Conference on Distributed Smart Cameras 2017 10.1145/3131885.3131932 Download Tanase AP. :Symbolic Parallelization of Nested Loop Programs 2017 )Download Tanase AP. , Witterauf M. , Teich J. Hannig F. Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays ACM Transactions on Embedded Computing Systems 17 2017 ), S. 31:1-31:27 ISSN: 1539-9087 10.1145/3092952 Download Teich J. Run-Time Monitoring and Enforcement of Non-functional Program Properties of Invasive Programs: Terms and Definitions 2017 )https://www12.informatik.uni-erlangen.de/publications/pub2017/reportTeich17.pdf Download Unat D. , Dubey A. , Hoefler T. , Shalf J. , Abraham M. , Bianco M. , Chamberlain BL. , Cledat R. , Edwards HC. , Finkel H. , Fürlinger K. , Hannig F. Jeannot E. , Kamil A. , Keasler J. , Kelly PHJ. , Leung VJ. , Ltaief H. , Maruyama N. , Newburn C. , Pericàs M. :Trends in Data Locality Abstractions for HPC Systems IEEE Transactions on Parallel and Distributed Systems 2017 )ISSN: 1045-9219 10.1109/TPDS.2017.2703149 Download Vogel-Heuser B. , Wildermann S. Teich J. Towards the co-evolution of industrial products and its production systems by combining models from development and hardware/software deployment in cyber-physical systems Production Engineering 11 2017 ), S. 687-694 ISSN: 0944-6524 10.1007/s11740-017-0765-0 Download Vogel-Heuser B. , Wildermann S. Teich J. Towards the Co-Evolution of Industrial Products and its Production Systems by Combining Models from Development and Hardware/Software Deployment in Cyber-Physical Systems Production Engineering 11 2017 ), S. 687-694 ISSN: 0944-6524 10.1007/s11740-017-0765-0 https://link.springer.com/article/10.1007/s11740-017-0765-0 Download Weichslgartner A. :Application Mapping Methodologies for Invasive NoC-Based Architectures 2017 )Download Witterauf M. , Hannig F. Teich J. Constructing Fast and Cycle-Accurate Simulators for Configurable Accelerators Using C++ Templates Symposium on Rapid System Prototyping (Seoul, South Korea 19. Oktober 2017 - 20. Oktober 2017 )In: Proceedings of the Symposium on Rapid System Prototyping 2017 Download Zaib A. , Heisswolf J. , Weichslgartner A. , Wild T. , Teich J. Becker J. , Herkersdorf A. :Efficient Task Spawning for Shared Memory and Message Passing in Many-core Architectures Journal of Systems Architecture 77 2017 ), S. 72-82 ISSN: 1383-7621 10.1016/j.sysarc.2017.03.004 Download Ziener D. :Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems 2017 )https://opus4.kobv.de/opus4-fau/files/9271/habilon.pdf Download Özkan MA. , Reiche O. , Hannig F. Teich J. A Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis Fourth International Workshop on FPGAs for Software Programmers (FSP) (Ghent 7. September 2017 )In: Proceedings of the Fourth International Workshop on FPGAs for Software Programmers (FSP) 2017 https://ieeexplore.ieee.org/document/8084549 Download Özkan MA. , Reiche O. , Hannig F. Teich J. Hardware Design and Analysis of Efficient Loop Coarsening and Border Handling for Image Processing 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Seattle 10. Juli 2017 - 12. Juli 2017 )In: 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2017 10.1109/ASAP.2017.7995273 https://www12.cs.fau.de/downloads/oezkan/publications/asap17.pdf Download
2016 Ah Sue J. , Hasholzner R. , Brendel J. , Kleinsteuber M. , Teich J. A Binary Time Series Model of LTE Scheduling for Machine Learning Prediction 10th IEEE International Conference on Self-Adaptive and Self-Organizing Systems (SASO 2016) (Augsburg 12. September 2016 - 16. September 2016 )In: 1st International Workshops on Foundations and Applications of Self-Adaptive and Self-Organizing Systems (SASO 2016)Self-Organizing Systems (SASO 2016) 2016 10.1109/FAS-W.2016.64 Download Aliee H. , Vitzethum S. , Glaß M. , Teich J. Borgonovo E. :Guiding Genetic Algorithms Using Importance Measures for Reliable Design of Embedded Systems 29th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (Connecticut 19. September 2016 - 20. September 2016 )In: Proceedings of 29th IEEE Symposium on Defect and Fault Tolerance in VLSI and 2016 Download Becher A. , Echavarria Gutiérrez JA. , Ziener D. , Wildermann S. Teich J. A LUT-Based Approximate Adder 24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016). (Washington DC 1. Mai 2016 - 3. Mai 2016 )In: Proceedings of the 24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines 2016 10.1109/FCCM.2016.16 Download Becher A. , Pirkl J. , Herrmann A. , Teich J. Wildermann S. Hybrid Energy-Aware Reconfiguration Management on Xilinx Zynq SoCs International Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancún In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig) 2016 10.1109/ReConFig.2016.7857177 Download Becher A. , Wildermann S. Mühlenthaler M. , Teich J. ReOrder: Runtime Datapath Generation for High-Throughput Multi-Stream Processing International Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancún In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs 2016 10.1109/ReConFig.2016.7857185 Download Bhadouria VS. , Tanase AP. , Schmid M. , Hannig F. Teich J. Ghoshal D. :A Novel Image Impulse Noise Removal Algorithm Optimized for Hardware Accelerators Journal of Signal Processing Systems 89 2016 ), S. 225-242 ISSN: 1939-8018 10.1007/s11265-016-1187-5 Download Borgonovo E. , Aliee H. , Glaß M. , Teich J. A New Time-Independent Reliability Importance Measure European Journal of Operational Research 2016 )ISSN: 0377-2217 10.1016/j.ejor.2016.03.054 Download Drescher G. , Erhardt C. , Freiling F. , Götzfried J. , Lohmann D. , Maene P. , Müller T. , Verbauwhede I. , Weichslgartner A. , Wildermann S. Providing security on demand using invasive computing it - Information Technology 58 2016 ), S. 281-295 ISSN: 1611-2776 10.1515/itit-2016-0032 Download Echavarria Gutiérrez JA. , Wildermann S. Becher A. , Teich J. Ziener D. :FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs International Conference on Field Programmable Technology (FPT 2016) (Xi'an 7. Dezember 2016 - 9. Dezember 2016 )In: Proceedings of 2016 International Conference on Field Programmable Technology 2016 10.1109/FPT.2016.7929536 Download Fanucci L. , Teich J. Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016 In: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016 2016 Download Fanucci L. , Teich J. Recap of the 2016 DATE Conference & Exhibition IEEE Design and Test of Computers 33 2016 ), S. 114-117 ISSN: 0740-7475 10.1109/MDAT.2016.2570223 Download Fickenscher J. , Reiche O. , Schlumberger J. , Hannig F. Teich J. Modeling, Programming and Performance Analysis of Automotive Environment Map Representations on Embedded GPUs 18th IEEE International High-Level Design Validation and Test Workshop (HLDVT) (Santa Cruz, CA 7. Oktober 2016 - 8. Oktober 2016 )In: Proceedings of the 18th IEEE International High-Level Design Validation and Test Workshop (HLDVT) 2016 10.1109/HLDVT.2016.7748257 Download Hannig F. A Quick Tour of High-Level Synthesis Solutions for FPGAs In: Dirk Koch, Frank Hannig, and Daniel Ziener (Hrsg.): FPGAs for Software Programmers Springer 2016 10.1007/978-3-319-26408-0_3 Download Hannig F. Cardoso J. , Fey D. , Schröder-Preikschat W. , Teich J. Architecture of computing systems – ARCS 2016: 29th international conference Nuremberg, Germany, April 4-7, 2016 Proceedings Springer Verlag 2016 ISBN: 9783319306940 10.1007/978-3-319-30695-7 Download Hannig F. Cardoso JMP. , Pionteck T. , Fey D. , Schröder-Preikschat W. , Teich J. Proceedings of the 29th International Conference on Architecture of Computing Systems (ARCS) Berlin; Heidelberg 2016 ISBN: 978-3-319-30694-0 10.1007/978-3-319-30695-7 Download Haubelt C. , Neubauer K. , Glaß M. :Supporting Composition in Symbolic System Synthesis International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS) (Samos 18. Juli 2016 - 21. Juli 2016 )Download Heißwolf J. , Friederich S. , Masing L. , Weichslgartner A. , Zaib A. , Stein C. , Duden M. , Teich J. Herkersdorf A. , Becker J. :A Novel NoC-Architecture for Fault Tolerance and Power Saving Third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS (Nuremberg 4. April 2016 - 5. April 2016 )In: In Proceedings of the third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS 2016 Download Henkel J. , Chen Q. , Schmitt-Landsiedel D. , Glocker E. , Sousa É. , Schlichtmann U. , Herkersdorf A. , Hannig F. Wenzel V. , Wagner P. , Sagi M. , Wild T. , Khdr H. , Pagani S. , Pathania A. , Bauer L. :Dark Silicon Management: An Integrated and Coordinated Cross-Layer Approach it - Information Technology 58 2016 ), S. 297-307 ISSN: 1611-2776 10.1515/itit-2016-0028 Download Herglotz C. , Rosales R. , Glaß M. , Teich J. Kaup A. :Multi-Objective Design Space Exploration for the Optimization of the HEVC Mode Decision Process Picture Coding Symposium(PCS) (Nürnberg 4. Dezember 2016 - 7. Dezember 2016 )In: Picture Coding Symposium (PCS) 2016 10.1109/PCS.2016.7906327 http://arxiv.org/abs/2203.01782 Download Häublein K. , Reichenbach M. , Reiche O. , Özkan MA. , Fey D. , Hannig F. Teich J. Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos 18. Juni 2016 - 21. Juni 2016 )In: Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2016 10.1109/SAMOS.2016.7818350 Download Keszöcze O. , Wille R. :Exploiting Electronic Design Automation for Checking Legal Regulations: A Vision In: Frank Oppenheimer, Julio Luis Medina Pasaje (Hrsg.): Languages, Design Methods, and Tools for Electronic System Design 2016 , S. 101 - 112 (Lecture Notes in Electrical Enginieering)ISBN: 978-3-319-24457-0 https://www.springer.com/de/book/9783319244556 Download Koch D. , Hannig F. Ziener D. (Hrsg.):FPGAs for Software Programmers Berlin; Heidelberg 2016 ISBN: 978-3-319-26406-6 10.1007/978-3-319-26408-0 Download Koch D. , Ziener D. , Hannig F. FPGA versus Software Programming - Why, When, and How? In: Dirk Koch, Frank Hannig, and Daniel Ziener (Hrsg.): FPGAs for Software Programmers 2016 , S. 1-21 10.1007/978-3-319-26408-0_1 Download Lari V. :Invasive Tightly Coupled Processor Arrays In: Springer book series on Computer Architecture and Design Methodologies Singapore Springer 2016 ISBN: 978-981-10-1058-3 10.1007/978-981-10-1058-3 Download Lari V. , Weichslgartner A. , Tanase AP. , Witterauf M. , Khosravi F. , Teich J. Heißwolf J. , Friederich S. , Becker J. :Providing Fault Tolerance Through Invasive Computing it - Information Technology 58 2016 ), S. 309-238 ISSN: 1611-2776 Download Letras M. , Hernández-León R. , Cumplido R. :Hardware Architectures for Frequent Itemset Mining Based on Equivalence Classes Partitioning 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) 10.1109/IPDPSW.2016.98 Download Letras M. , Morales-Reyes A. , Cumplido R. :A scalable and customizable processor array for implementing cellular genetic algorithms Neurocomputing 2016 ), S. 899 - 910 ISSN: 0925-2312 10.1016/j.neucom.2015.05.128 http://www.sciencedirect.com/science/article/pii/S0925231215015933 Download Membarth R. , Reiche O. , Hannig F. Teich J. Körner M. , Eckert W. :HIPAcc: A Domain-Specific Language and Compiler for Image Processing IEEE Transactions on Parallel and Distributed Systems 27 2016 ), S. 210-224 ISSN: 1045-9219 10.1109/TPDS.2015.2394802 Download Mitra T. , Teich J. Thiele L. (Hrsg.):Adaptive Isolation for Predictability and Security 2016 Download Navet N. , Seyler J. , Migge J. :Timing Verification of Realtime Automotive Networks: What can we expect from Simulation? 8th European Congress on Embedded Real Time Software and Systems (ERTS) (Toulouse 27. Januar 2016 - 29. Januar 2016 )In: Proceedings of the 8th European Congress on Embedded Real Time Software and Systems (ERTS) 2016 Download Posewsky T. , Ziener D. :Efficient Deep Neural Network Acceleration through FPGA-based Batch Processing International Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancún 30. November 2016 - 2. Dezember 2016 )In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig) 2016 10.1109/ReConFig.2016.7857167 Download Pöppl A. , Bader M. , Schwarzer T. , Glaß M. :Simulating shallow water waves with lazy activation of patches using ActorX10 Second International Workshop on Extreme Scale Programming Models and Middleware (ESPM2) In: Proceedings of the Second International Workshop on Extreme Scale Programming Models and Middleware (ESPM2) 2016 10.1109/ESPM2.2016.9 Download Roloff S. , Hannig F. Teich J. InvadeSIM: A Simulator for Heterogeneous Multi-Processor Systems-on-Chip Design, Automation and Test in Europe (DATE) (Dresden 14. März 2016 - 18. März 2016 )In: Tool presentation at the University Booth 2016 https://www.date-conference.com/system/files/file/date16/ubooth/37912.pdf Download Roloff S. , Pöppl A. , Schwarzer T. , Wildermann S. Baader M. , Glaß M. , Hannig F. Teich J. ActorX10: An Actor Library for X10 ACM SIGPLAN X10 Workshop (X10), ACM (Santa Barbara, CA In: Proceedings of the 6th ACM SIGPLAN X10 Workshop (X10) 2016 Download Rosales R. , Herglotz C. , Glaß M. , Teich J. Kaup A. :Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling Architecture of Computing Systems (ARCS) (Nürnberg 4. April 2016 - 7. April 2016 )In: Springer (Hrsg.): In Proceedings of the International Conference on Architecture of Computing Systems (ARCS) , Berlin; Heidelberg 2016 10.1007/978-3-319-30695-7_20 Download Salcic Z. , Nadeem M. , Park H. , Teich J. A heterogeneous multi-core SoC for mixed criticality industrial automation systems Emerging Technologies and Factory Automation (ETFA) In: Proceedings Emerging Technologies and Factory Automation (ETFA), 2016 IEEE 21st International Conference 2016 Download Salcic Z. , Nadeem M. , Park H. , Teich J. Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-Core Processor 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16) (Lyon 21. September 2016 - 23. September 2016 )In: Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16) 2016 Download Schmid M. , Reiche O. , Hannig F. Teich J. HIPAcc In: Dirk Koch, Frank Hannig, and Daniel Ziener (Hrsg.): FPGAs for Software Programmers Springer 2016 10.1007/978-3-319-26408-0_12 Download Schmid M. , Schmitt C. , Hannig F. Malazgirt GA. , Sönmez N. , Yurdakul A. , Cristal A. :Big Data and HPC Acceleration with Vivado HLS In: Dirk Koch, Frank Hannig, and Daniel Ziener (Hrsg.): FPGAs for Software Programmers Springer 2016 , S. 115-136 10.1007/978-3-319-26408-0_7 Download Schmitt C. , Kuckuk S. , Hannig F. Teich J. Köstler H. , Rüde U. , Lengauer C. :Systems of Partial Differential Equations in ExaSlang In: Software for Exascale Computing - SPPEXA 2013-2015 Berlin, Heidelberg, New York Springer 2016 , S. 47-67 (Lecture Notes in Computational Science and Engineering, Bd.113)ISBN: 9783319405261 10.1007/978-3-319-40528-5_3 Download Selgrad K. , Lier A. , Dörntlein J. , Reiche O. , Stamminger M. :A High-Performance Image Processing DSL for Heterogeneous Architectures 9th European Lisp Symposium (Krakau 9. Mai 2016 - 10. Mai 2016 )In: Proceedings of ELS 9th European Lisp Symposium 2016 https://dl.acm.org/citation.cfm?id=3005729.3005734 Download Smirnov F. , Glaß M. , Reimann F. , Teich J. Formal Reliability Analysis of Switched Ethernet Automotive Networks under Transient Transmission Errors 53nd ACM/EDAC/IEEE Design Automation Conference (DAC 2016) (Austin 5. Juni 2016 - 9. Juni 2016 )In: Proceedings of the 53nd ACM/EDAC/IEEE Design Automation Conference (DAC 2016) 2016 Download Streit FJ. , Pantho MJH. , Bobda C. , Roullet C. :Vision-Based Path Construction and Maintenance for Indoor Guidance of Autonomous Ground Vehicles Based on Collaborative Smart Cameras International Conference on Distributed Smart Cameras (ICDSC) (Paris, France 12. September 2017 - 15. September 2017 )In: ACM Proceedings of the 10th International Conference on Distributed Smart Cameras 2016 10.1145/2967413.2967425 Download Tanase AP. , Witterauf M. , Sousa É. , Lari V. , Hannig F. Teich J. LoopInvader: A Compiler for Tightly Coupled Processor Arrays Design, Automation and Test in Europe (DATE) (Dresden 14. März 2016 - 18. März 2016 )In: Tool presentation at the University Booth 2016 https://www.date-conference.com/system/files/file/date16/ubooth/37913.pdf Download Teich J. Invasive Computing - Editorial it - Information Technology 58 2016 ), S. 263-265 ISSN: 1611-2776 Download Teich J. Glaß M. , Roloff S. , Schröder-Preikschat W. , Snelting G. , Weichslgartner A. , Wildermann S. Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution using Invasive Computing 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16) (Lyon 21. September 2016 - 23. September 2016 )In: Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16) 2016 10.1109/MCSoC.2016.30 Download Wang B. , Xu Y. , Hasholzner R. , Drewes C. , Rosales R. , Graf S. , Falk J. Glaß M. , Teich J. Exploration of Power Domain Partitioning for Application-Specific SoCs in System-Level Design 19. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2016) (Freiburg 1. März 2016 - 2. März 2016 )In: In Proceedings of the 19. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2016) 2016 10.6094/UNIFR/10643 Download Weichslgartner A. , Teich J. Position Paper: Towards Redundant Communication through Hybrid Application Mapping Third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) (Nuremberg 4. April 2016 - 5. April 2016 )In: Proceedings of the third International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) 2016 Download Weichslgartner A. , Wildermann S. Götzfried J. , Freiling F. , Glaß M. , Teich J. Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (St. Goar 23. Mai 2016 - 25. Mai 2016 )In: In Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2016 10.1145/2906363.2906370 Download Wildermann S. Bader M. , Bauer L. , Damschen M. , Gabriel D. , Gerndt M. , Glaß M. , Henkel J. , Paul J. , Pöppl A. , Roloff S. , Schwarzer T. , Snelting G. , Stechele W. , Teich J. Weichslgartner A. , Zwinkau A. :Invasive Computing for Timing-Predictable Stream Processing on MPSoCs it - Information Technology 58 2016 ), S. 267-280 ISSN: 1611-2776 10.1515/itit-2016-0021 Download Wille R. , Keszocze O. , Walter M. , Rohrs P. , Chattopadhyay A. , Drechsler R. :Look-Ahead Schemes for Nearest Neighbor Optimization of 1D and 2D Quantum Circuits 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016 10.1109/ASPDAC.2016.7428026 Download Witterauf M. , Tanase AP. , Hannig F. Teich J. Modulo Scheduling of Symbolically Tiled Loops for Tightly Coupled Processor Arrays IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (London 6. Juli 2016 - 8. Juli 2016 )In: Proceedings of the 27th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2016 Download Xu Y. , Teich J. Hierarchical Statistical Leakage Analysis and its Application ACM Transactions on Design Automation of Electronic Systems 2016 )ISSN: 1084-4309 Download Ziener D. , Weber H. , Vogt JS. , Schürfeld U. , Meyer-Wegener K. , Teich J. Dennl C. , Becher A. , Bauer F. :FPGA-Based Dynamically Reconfigurable SQL Query Processing ACM Transactions on Reconfigurable Technology and Systems 9 2016 ), S. 25:1-25:24 ISSN: 1936-7406 10.1145/2845087 Download Özkan MA. , Reiche O. , Hannig F. Teich J. FPGA-Based Accelerator Design from a Domain-Specific Language 26th International Conference on Field-Programmable Logic and Applications (FPL) (Lausanne 29. August 2016 - 2. September 2016 )In: Proceedings of the 26th International Conference on Field-Programmable Logic and Applications (FPL) 2016 10.1109/FPL.2016.7577357 Download
2015 Aliee H. , Borgonovo E. , Glaß M. , Teich J. Importance measures in time-dependent reliability analysis and system design 25th European Safety and Reliability Conference, ESREL 2015 (Zürich 7. September 2015 - 10. September 2015 )In: Proceedings of the Annual European Safety and Reliability Conference (ESREL '15) 2015 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84959018237&origin=inward Download Aliee H. , Glaß M. , Chen L. , Ebrahimi M. , Khosravi F. , Kleeberger VB. , Listl A. , Müller-Gritschneder D. , Oboril F. , Schlichtmann U. , Tahoori MB. , Teich J. Wehn N. , Weis C. :Application-aware cross-layer reliability analysis and optimization it - Information Technology 57 2015 ), S. 159-169 ISSN: 1611-2776 10.1515/itit-2014-1080 Download Becher A. , Echavarria Gutiérrez JA. , Ziener D. , Teich J. Approximate Adder Structures on FPGAs AxC15: 1st Workshop on Approximate Computing (Paderborn, Germany https://www12.cs.fau.de/downloads/echavarria/pub/Approximate_Adder_Structures_on_FPGAs.pdf Download Becher A. , Ziener D. , Meyer-Wegener K. , Teich J. A co-design approach for accelerated SQL query processing via FPGA-based data filtering International Conference on Field Programmable Technology, FPT 2015 (Queenstown 7. Dezember 2015 - 9. Dezember 2015 )10.1109/FPT.2015.7393148 Download Biglari M. , Barijough KM. , Goudarzi M. , Pourmohseni B. :A Fine-Grained Configurable Cache Architecture for Soft Processors International Symposium on Computer Architecture and Digital Systems (CADS) (Tehran 7. Oktober 2015 - 8. Oktober 2015 )In: Proceedings of the 18th CSI International Symposium on Computer Architecture and Digital Systems (CADS) 2015 10.1109/CADS.2015.7377783 https://ieeexplore.ieee.org/document/7377783/ Download Boppu S. :Code Generation for Tightly Coupled Processor Arrays 2015 )Download Falk J. A Clustering-Based MPSoC Design Flow for Data Flow-Oriented Applications 2015 )10.13140/RG.2.1.5029.5763 Download Falk J. Schwarzer T. , Glaß M. , Teich J. Zebelein C. , Haubelt C. :Quasi-static scheduling of data flow graphs in the presence of limited channel capacities 13th IEEE Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2015 10.1109/ESTIMedia.2015.7351766 Download Falk J. Schwarzer T. , Zhang L. , Glaß M. , Teich J. Automatic communication-driven virtual prototyping and design for networked embedded systems Microprocessors and Microsystems 39 2015 ), S. 1012–1028 ISSN: 0141-9331 10.1016/j.micpro.2015.08.008 Download Gangadharan D. , Sousa É. , Lari V. , Hannig F. Teich J. Application-driven reconfiguration of shared resources for timing predictability of MPSoC platforms 48th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 (Pacific Grove, CA 2. November 2014 - 5. November 2014 )In: Proceedings of Asilomar Conference on Signals, Systems, and Computers (ASILOMAR) 2015 10.1109/ACSSC.2014.7094471 Download Glein R. , Rittner F. , Becher A. , Ziener D. , Frickel J. , Teich J. Heuberger A. :Reliability of Space-Grade vs. COTS SRAM-Based FPGA in N-Modular Redundancy 2015 NASA/ESA Conference on Adaptive Hardware and Systems (Montreal 15. Juni 2015 - 18. Juni 2015 )In: IEEE (Hrsg.): Proceedings of 2015 NASA/ESA Conference on Adaptive Hardware and Systems 2015 Download Graf S. :Design and Optimization of Multi-Variant Automotive E/E Architecture Component Platforms 2015 )Download Graf S. , Glaß M. , Teich J. Symbolic Message Routing for Multi-Objective Optimization of Automotive E/E Architecture Component Platforms 18. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2015) (Chemnitz 3. März 2015 - 4. März 2015 )In: Proceedings of 18. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2015) 2015 Download Graf S. , Glaß M. , Teich J. Platte D. :A Methodology for the Optimized Design of an E/E Architecture Component Platform Stuttgart International Symposium (Stuttgart 17. März 2015 - 18. März 2015 )In: Proceedings of the Stuttgart International Symposium 2015 10.1007/978-3-658-08844-6_14 Download Graf S. , Reinhart S. , Glaß M. , Teich J. Platte D. :Robust Design of E/E Architecture Component Platforms 52nd ACM/EDAC/IEEE Design Automation Conference (DAC 2015) (San Francisco, CA 7. Juni 2015 - 11. Juni 2015 )In: Proceedings of the 52nd ACM/EDAC/IEEE Design Automation Conference (DAC 2015) 2015 10.1145/2744769.2747941 Download Hannig F. Fey D. , Lokhmotov A. (Hrsg.):Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) 2015 http://arxiv.org/abs/1502.07241 http://arxiv.org/abs/1502.07241 Download Hannig F. Herkersdorf A. :Introduction to the Special Issue on Testing, Prototyping, and Debugging of Multi-Core Architectures Journal of Systems Architecture 61 2015 ), S. 600 ISSN: 1383-7621 10.1016/j.sysarc.2015.11.003 Download Hannig F. Koch D. , Ziener D. (Hrsg.):Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015) 2015 Download Heißwolf J. , Weichslgartner A. , Zaib A. , Friederich S. , Masing L. , Stein C. , Duden M. , Klöpfer R. , Teich J. Wild T. , Herkersdorf A. , Becker J. :Fault-tolerant communication in invasive networks on chip NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2015 In: Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS) 2015 10.1109/AHS.2015.7231156 Download Khosravi F. , Müller M. , Glaß M. , Teich J. Uncertainty-aware reliability analysis and optimization 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 (Grenoble 9. März 2015 - 13. März 2015 )In: Proceedings of Design, Automation and Test in Europe (DATE 2015) 2015 10.7873/DATE.2015.0319 Download Kuckuk S. , Schmitt C. , Kronawitter S. :ExaSlang and the ExaStencils Code Generator PASC'15 (Zürich 1. Juni 2015 - 3. Juni 2015 )Download Lari V. :Invasive Tightly Coupled Processor Arrays 2015 )Download Lari V. , Tanase AP. , Teich J. Witterauf M. , Khosravi F. , Hannig F. Meyer B. :A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable Arrays NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2015 (Montreal 15. Juni 2016 - 18. Juni 2015 )In: Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems 2015 10.1109/AHS.2015.7231157 Download Morales-Reyes A. , Escalante HJ. , Letras M. , Cumplido R. :An Empirical Analysis on Dimensionality in Cellular Genetic Algorithms Annual Conference on Genetic and Evolutionary Computation - GECCO '15 10.1145/2739480.2754699 http://doi.acm.org/10.1145/2739480.2754699 Download Mühlenthaler M. :Degree-constrained Subgraph Reconfiguration is in P 40th International Symposium on Mathematical Foundations of Computer Science (MFCS) (Milano 24. August 2015 - 28. August 2015 )In: Proceedings of the 40th International Symposium on Mathematical Foundations of Computer Science (MFCS) 2015 Download Mühlenthaler M. :Fairness in Academic Course Timetabling Cham, Heidelberg, New York, Dordrecht, London Springer International Publishing 2015 ISBN: 978-3-319-12798-9 10.1007/978-3-319-12799-6 Download Mühlenthaler M. :Fairness in Academic Course Timetabling 2015 )10.1007/978-3-319-12799-6 Download Paul J. , Stechele W. , Oechslein B. , Erhardt C. , Schedel J. , Lohmann D. , Schröder-Preikschat W. , Kröhnert M. , Asfour T. , Sousa É. , Hannig F. Lari V. , Teich J. Grudnitsky A. , Bauer L. , Henkel J. :Resource-awareness on heterogeneous MPSoCs for image processing Journal of Systems Architecture 61 2015 ), S. 668-680 ISSN: 1383-7621 10.1016/j.sysarc.2015.09.002 Download Raß A. , Schmitt M. , Wanka R. Explanation of Stagnation at Points that are not Local Optima in Particle Swarm Optimization by Potential Analysis 17th Genetic and Evolutionary Computation Conference (GECCO) (Madrid, Spain 11. Juli 2015 - 15. Juli 2015 )In: ACM New York, NY, USA (Hrsg.): Companion of Proc. 17th Genetic and Evolutionary Computation Conference (GECCO) 2015 10.1145/2739482.2764654 Download Raß A. , Schmitt M. , Wanka R. Explanation of Stagnation at Points that are not Local Optima in Particle Swarm Optimization by Potential Analysis [Extended Version] 2015 )https://arxiv.org/abs/1504.08241 Download Reiche O. , Häublein K. , Reichenbach M. , Hannig F. Teich J. Fey D. :Automatic Optimization of Hardware Accelerators for Image Processing DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (Grenoble 13. März 2015 - 13. März 2015 )In: Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) 2015 http://arxiv.org/abs/1502.07448 Download Reiche O. , Häublein K. , Reichenbach M. , Schmid M. , Hannig F. Teich J. Fey D. :Synthesis and Optimization of Image Processing Accelerators using Domain Knowledge Journal of Systems Architecture 61 2015 ), S. 646-658 ISSN: 1383-7621 10.1016/j.sysarc.2015.09.004 https://www12.cs.fau.de/downloads/reiche/publications/RHRSHTF15.pdf Download Roloff S. , Schafhauser D. , Hannig F. Teich J. Execution-driven parallel simulation of PGAS applications on heterogeneous tiled architectures 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015 (San Francisco, CA 7. Juni 2015 - 11. Juni 2015 )In: Proceedings of the 52nd ACM/EDAC/IEEE Design Automation Conference (DAC) 2015 10.1145/2744769.2744840 Download Roloff S. , Wildermann S. Hannig F. Teich J. Invasive computing for predictable stream processing: A simulation-based case study 13th IEEE Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2015 (Amsterdam 8. Oktober 2015 - 9. Oktober 2015 )10.1109/ESTIMedia.2015.7351761 Download Schmid M. :Rapid Prototyping for Hardware Accelerators in the Medical Imaging Domain 2015 )Download Schmid M. , Reiche O. , Hannig F. Teich J. Loop Coarsening in C-based High-Level Synthesis 26th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Toronto 27. Juli 2015 - 29. Juli 2015 )In: Proceedings of the 26th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2015 10.1109/ASAP.2015.7245730 https://www12.cs.fau.de/downloads/reiche/publications/SRHT15.pdf Download Schmitt C. , Schmid M. , Hannig F. Teich J. Kuckuk S. , Köstler H. :Generation of Multigrid-based Numerical Solvers for FPGA Accelerators 2nd International Workshop on High-Performance Stencil Computations (HiStencils) (Amsterdam 20. Januar 2015 - 20. Januar 2015 )In: Proceedings of the 2nd International Workshop on High-Performance Stencil Computations (HiStencils) 2015 https://www12.cs.fau.de/downloads/schmittch/publications/SSHTKK15histencils.pdf Download Schmitt M. :Convergence Analysis for Particle Swarm Optimization 2015 )https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-61621 Download Schmitt M. , Wanka R. Particle Swarm Optimization Almost Surely Finds Local Optima Theoretical Computer Science 561A 2015 ), S. 57-72 ISSN: 0304-3975 10.1016/j.tcs.2014.05.017 Download Schmitt M. , Wanka R. Schwab L. :Multimodal Medical Image Registration Using Particle Swarm Optimization with Influence of the Data's Initial Orientation 12th IEEE Conf. on Computational Intelligence in Bioinformatics and Computational Biology (CIBCB) (Niagara Falls In: Proc. 12th IEEE Conf. on Computational Intelligence in Bioinformatics and Computational Biology (CIBCB) 2015 10.1109/CIBCB.2015.7300314 Download Schwarzer T. , Falk J. Glaß M. , Teich J. Zebelein C. , Haubelt C. :Throughput-optimizing compilation of dataflow applications for multi-cores using quasi-static scheduling 18th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2015 (St. Goar In: Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2015 10.1145/2764967.2764972 Download Seyler J. , Navet N. , Fejoz L. , Teich J. Insights on the Configuration and Performances of SOME/IP Service Discovery SAE International Journal of Passenger Cars - Electronic and Electrical Systems 8 2015 ), S. 124-129 ISSN: 1946-4614 Download Seyler J. , Streichert T. , Glaß M. , Navet N. , Teich J. Formal analysis of the startup delay of SOME/IP service discovery 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 (Grenoble 9. März 2015 - 13. März 2015 )In: Proceedings of Design, Automation and Test in Europe (DATE 2015) 2015 10.7873/DATE.2015.0469 Download Sousa É. , Hannig F. Teich J. Reconfigurable Buffer Structures for Coarse-Grained Reconfigurable Arrays International Embedded Systems Symposium (IESS) (Foz do Iguaçu 3. November 2015 - 6. November 2015 )In: Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, and Achim Rettberg (Hrsg.): Proceedings of the International Embedded Systems Symposium (IESS) 2015 10.1007/978-3-319-90023-0 http://www.springer.com/us/book/9783319900223 Download Sousa É. , Hannig F. Teich J. Schlichtmann U. , Chen Q. :Runtime adaptation of application execution under thermal and power constraints in massively parallel processor arrays 18th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2015 (St. Goar 1. Juni 2015 - 3. Juni 2015 )In: In Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2015 10.1145/2764967.2771933 Download Tanase AP. , Witterauf M. , Hannig F. Teich J. Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015 (Austin 21. September 2015 - 23. September 2015 )In: Proceedings of the 13th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) 2015 10.1109/MEMCOD.2015.7340486 Download Tanase AP. , Witterauf M. , Teich J. Hannig F. Lari V. :On-demand fault-tolerant loop processing on massively parallel processor arrays 26th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2015 (Toronto 27. Juli 2015 - 29. Juli 2015 )In: In Proceedings of the 26th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2015 10.1109/ASAP.2015.7245734 Download Teich J. Adaptive Isolation for Predictable MPSoC Stream Processing 18th Int. Workshop on Software and Compilers for Embedded Systems (SCOPES 2015) (Schloss Rheinfels, St. Goar 1. Juni 2015 - 3. Juni 2015 )In: Proc. of the 18th Int. Workshop on Software and Compilers for Embedded Systems (SCOPES 2015) 2015 10.1145/2764967.2771821 Download Teich J. Boppu S. , Hannig F. Lari V. :Compact Code Generation and Throughput Optimization for Coarse-Grained Reconfigurable Arrays In: Luk, Wayne, Constantinides, George A. (Hrsg.): Transforming Reconfigurable Systems: A Festschrift Celebrating the 60th Birthday of Professor Peter Cheung 2015 , S. 167-206 ISBN: 978-1-78326-696-8 10.1142/9781783266975_0010 Download Teich J. Lari V. , Tanase AP. , Witterauf M. , Khosravi F. , Meyer B. :Techniques for on-demand structural redundancy for massively parallel processor arrays Journal of Systems Architecture 61 2015 ), S. 615-627 ISSN: 1383-7621 10.1016/j.sysarc.2015.10.004 Download Tobola A. , Espig C. , Streit FJ. , Korpok O. , Leutheuser H. , Schmitz B. , Hofmann C. , Struck M. , Weigand C. , Eskofier B. , Fischer G. :Scalable ECG Hardware and Algorithms for Extended Runtime of Wearable Sensors IEEE International Symposium on Medical Measurements and Applications (MeMeA) (Torino In: 2015 IEEE International Symposium on Medical Measurements and Applications 2015 10.1109/MeMeA.2015.7145209 Download Tobola A. , Streit FJ. , Espig C. , Korpok O. , Leutheuser H. , Sauter C. , Lang N. , Schmitz B. , Hofmann C. , Struck M. , Weigand C. , Eskofier B. , Fischer G. :Sampling rate impact on energy consumption of biomedical signal processing systems 12th International Conference on Wearable and Implantable Body Sensor Networks (BSN) (Cambridge, USA 9. Juni 2015 - 12. Juni 2015 )10.1109/BSN.2015.7299392 Download Weichslgartner A. , Heißwolf J. , Zaib A. , Wild T. , Herkersdorf A. , Becker J. , Teich J. Position Paper: Towards Hardware-Assisted Decentralized Mapping of Applications for Heterogeneous NoC Architectures. International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) (Porto 24. März 2015 - 24. März 2015 )In: Proceedings of the second International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) 2015 Download Wildermann S. Weichslgartner A. , Teich J. Design Methodology and Run-Time Management for Predictable Many-Core Systems 18th IEEE International Symposium on Real-Time Distributed Computing Workshops, ISORCW 2015 (Auckland In: Proceedings of the 6th IEEE Workshop on Self-Organizing Real-Time Systems (SORT 2015) 2015 10.1109/ISORCW.2015.48 Download Witterauf M. , Tanase AP. , Hannig F. Teich J. Adaptive Fault Tolerance in Tightly Coupled Processor Arrays with Invasive Computing 11th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) (Fiuggi 12. Juli 2015 - 18. Juli 2015 )In: Proceedings of the 11th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) 2015 Download Witterauf M. , Tanase AP. , Teich J. Lari V. , Zwinkau A. , Snelting G. :Adaptive fault tolerance through invasive computing NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2015 (Montreal 15. Juni 2016 - 18. Juni 2015 )In: Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems 2015 10.1109/AHS.2015.7231155 Download Xu Y. :System-Level Power and Performance Estimation in Early SoC Design Phases 2015 )Download Zaib A. , Heißwolf J. , Weichslgartner A. , Wild T. , Teich J. Becker J. , Herkersdorf A. :Network interface with task spawning support for NoC-based DSM architectures 28th International Conference on Architecture of Computing Systems, ARCS 2015 (Porto 24. März 2015 - 24. März 2015 )In: Proceedings of 28th GI/ITG International Conference on Architecture of Computing Systems (ARCS) 2015 10.1007/978-3-319-16086-3_15 Download Zhang L. , Glaß M. , Ballmann N. , Teich J. Bridging Algorithm and ESL Design: MATLAB/Simulink Model Transformation and Validation In: Marie-Minerve Louërat, Torsten Maehne (Hrsg.): Languages, Design Methods, and Tools for Electronic System Design Springer 2015 , S. 189-206 ISBN: 978-3-319-06316-4 10.1007/978-3-319-06317-1_10 Download Ziener D. , Bauer F. , Becher A. , Dennl C. , Meyer-Wegener K. , Schürfeld U. , Teich J. Vogt JS. , Weber H. :FPGA-Based Dynamically Reconfigurable SQL Query Processing ACM Transactions on Reconfigurable Technology and Systems 2015 )ISSN: 1936-7406 Download
2014 Abelein U. , Cook A. , Engelke P. , Glaß M. , Reimann F. , Gómez LR. , Russ T. , Teich J. Ull D. , Wunderlich HJ. :Non-Intrusive Integration of Advanced Diagnosis Features in Automotive E/E-Architectures Design, Automation and Test in Europe (DATE) (Dresden 24. März 2014 - 28. März 2014 )In: Proc. of Design, Automation and Test in Europe (DATE) , New York, NY, USA 2014 10.7873/DATE2014.373 Download Aliee H. , Glaß M. , Khosravi F. , Teich J. An efficient technique for computing importance measures in automatic design of dependable embedded systems 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014 (New Delhi 12. Oktober 2014 - 17. Oktober 2014 )In: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2014) 2014 10.1145/2656075.2656079 Download Aliee H. , Glaß M. , Wanka R. Teich J. Automatic Graph-based Success Tree Construction and Analysis Annual Reliability and Maintainability Symposium (RAMS) (Colorado Springs, Colorado, USA 27. Januar 2014 - 30. Januar 2014 )In: Proc. 60th Annual Reliability and Maintainability Symposium (RAMS) 2014 10.1109/RAMS.2014.6798487 https://www12.informatik.uni-erlangen.de/people/rwanka/publications/AGWT14.php Download Bassimir B. Schmitt M. , Wanka R. How Much Forcing is Necessary to Let the Results of Particle Swarms Converge? International Conference on Swarm Intelligence Based Optimization (ICSIBO) In: Proc. Int. Conf. on Swarm Intelligence Based Optimization (ICSIBO) 2014 10.1007/978-3-319-12970-9_11 http://www12.cs.fau.de/people/rwanka/publications/BSW14.php Download Becher A. , Bauer F. , Ziener D. , Teich J. Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration 24th International Conference on Field Programmable Logic and Applications, FPL 2014 (Munich 2. September 2014 - 4. September 2014 )In: Proceedings of the Conference on Field-Programmable Logic and Applications (FPL 2014) 2014 10.1109/FPL.2014.6927502 Download Boppu S. , Hannig F. Teich J. Compact Code Generation for Tightly-Coupled Processor Arrays Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 77(1-2) 2014 ), S. 5-29 ISSN: 1387-5485 10.1007/s11265-014-0891-2 Download Echavarria Gutiérrez JA. , Morales-Reyes A. , Cumplido R. , Salido MA. :FSM Merging and Reduction for IP Cores Watermarking using Genetic Algorithms 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig) (Cancun 8. Dezember 2014 - 10. Dezember 2014 )In: Proceedings of 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig) 2014 10.1109/ReConFig.2014.7032525 Download Gangadharan D. , Tanase AP. , Hannig F. Teich J. Timing Analysis of a Heterogeneous Architecture with Massively Parallel Processor Arrays DATE Friday Workshop on Performance, Power and Predictability of Many-Core Embedded Systems (3PMCES) (Dresden, Germany 28. März 2014 - 28. März 2014 )https://ecsi.org/resource/workshop/2014/3PMCES/DATE/paper/timing-analysis-heterogeneous-architecture-massively-parallel-processor-arrays Download Gangadharan D. , Teich J. Chakraborty S. :Quality-aware video decoding on thermally-constrained MPSoC platforms 25th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2014 (Zurich 18. Juni 2014 - 29. Juni 2014 )In: Proceedings of the 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2014 10.1109/ASAP.2014.6868670 Download Glaß M. , Graf S. , Reimann F. , Teich J. Design and Evaluation of Future Ethernet AVB-based ECU Networks In: Embedded Systems Development, From Functional Models to Implementations 2014 Berlin; Heidelberg Springer-Verlag 2014 , S. 205-220 ISBN: 978-1-4614-3878-6 Download Glein R. , Schmidt B. , Rittner F. , Teich J. Ziener D. :A self-adaptive SEU mitigation system for FPGAs with an internal block RAM radiation particle sensor 22nd IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014 (Boston 11. Mai 2014 - 13. Mai 2014 )In: Proceedings of Field-Programmable Custom Computing Machines (FCCM 2014) 2014 10.1109/FCCM.2014.79 Download Glocker E. , Boppu S. , Chen Q. , Schlichtmann U. , Teich J. Schmitt-Landsiedel D. :Temperature modeling and emulation of an ASIC temperature monitor system for Tightly-Coupled Processor Arrays (TCPAs) Advances in Radio Science 12 2014 ), S. 103-109 ISSN: 1684-9973 10.5194/ars-12-103-2014 Download Graf S. , Glaß M. , Teich J. Lauer C. :Design Space Exploration for Automotive E/E Architecture Component Platforms Euromicro Conference on Digital System Design (DSD) (Verona 27. August 2014 - 29. August 2014 )In: Proc. of Euromicro Conference on Digital System Design (DSD) , New York, NY, USA 2014 10.1109/DSD.2014.43 Download Graf S. , Glaß M. , Teich J. Lauer C. :Multi-Variant-based Design Space Exploration for Automotive Embedded Systems Design, Automation and Test in Europe (DATE) (Dresden 24. März 2014 - 28. März 2014 )In: Proc. of Design, Automation and Test in Europe (DATE) , New York, NY, USA 2014 10.7873/DATE2014.020 Download Graf S. , Reimann F. , Glaß M. , Teich J. Towards Scalable Symbolic Routing for Multi-Objective Networked Embedded System Design and Optimization International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (New Delhi 12. Oktober 2014 - 17. Oktober 2014 )In: Proc. of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) , New York, NY, USA 2014 10.1145/2656075.2656102 Download Grebhahn A. , Kuckuk S. , Schmitt C. , Köstler H. , Siegmund N. , Apel S. , Hannig F. Teich J. Experiments on Optimizing the Performance of Stencil Codes with SPL Conqueror Parallel Processing Letters 24 2014 )ISSN: 0129-6264 10.1142/S0129626414410011 Download Grebhahn A. , Siegmund N. , Apel S. , Kuckuk S. , Schmitt C. :Optimizing the Performance of Customizable Stencil Codes with Feature-Interaction Detection Download Grebhahn A. , Siegmund N. , Apel S. , Kuckuk S. , Schmitt C. , Köstler H. :Optimizing Performance of Stencil Code with SPL Conqueror 1st International Workshop on High-Performance Stencil Computations (HiStencils) (Vienna 20. Januar 2014 - 20. Januar 2014 )In: Proceedings of the 1st International Workshop on High-Performance Stencil Computations (HiStencils) 2014 https://www12.cs.fau.de/downloads/schmittch/publications/GSAKSK14histencils.pdf Download Hannig F. Koch D. , Ziener D. (Hrsg.):Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014) 2014 Download Hannig F. Lari V. , Boppu S. , Tanase AP. , Reiche O. :Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach ACM Transactions on Embedded Computing Systems 13 2014 ), S. 133:1-133:29 ISSN: 1539-9087 10.1145/2584660 Download Hannig F. Teich J. Proceedings of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014) 2014 Download Heisswolf J. , Zaib A. , Zwinkau A. , Kobbe S. , Weichslgartner A. , Teich J. Henkel J. , Snelting G. , Herkersdorf A. , Becker J. :CAP: Communication Aware Programming The 51st Annual Design Automation Conference (DAC) (San Francisco, CA 2. Juni 2014 - 5. Juni 2014 )In: Proc. of The 51st Annual Design Automation Conference (DAC) , New York, NY, USA 2014 10.1145/2593069.2593103 Download Herkersdorf A. , Aliee H. , Engel M. , Glaß M. , Gimmler-Dumont C. , Henkel J. , Kleeberger VB. , Kochte MA. , Kühn JM. , Mueller-Gritschneder D. , Nassif SR. , Rauchfuss H. , Rosenstiel W. , Schlichtmann U. , Shafique M. , Tahoori MB. , Teich J. Wehn N. , Weis C. , Wunderlich HJ. :Resilience Articulation Point (RAP): Cross-layer Dependability Modeling for Nanometer System-on-Chip Resilience Microelectronics Reliability 54 2014 ), S. 1066-1074 ISSN: 0026-2714 10.1016/j.microrel.2013.12.012 Download Keszocze O. , Wille R. , Ho TY. , Drechsler R. :Exact One-Pass Synthesis of Digital Microfluidic Biochips 51st Annual Design Automation Conference, DAC 2014 (San Francisco, CA 10.1145/2593069.2593135 Download Khosravi F. , Reimann F. , Glaß M. , Teich J. Multi-objective local-search optimization using reliability importance measuring 51st Annual Design Automation Conference, DAC 2014 (San Francisco, CA 1. Juni 2014 - 5. Juni 2014 )In: Proceedings of the 51st Design Automation Conference (DAC 2014) 2014 10.1145/2593069.2593164 Download Kuckuk S. , Schmitt C. , Köstler H. , Hannig F. Teich J. Generating Highly Parallel Geometric Multigrid Solvers with the ExaStencils Apporach 3rd Workshop on Extreme-scale Programming Tools (New Orleans 17. November 2014 - 17. November 2014 )Download Lange V. , Schmitt M. , Wanka R. Towards a Better Understanding of the Local Attractor in Particle Swarm Optimization: Speed and Solution Quality International Conference on Adaptive and Intelligent Systems (ICAIS) (Bournemouth, UK 8. September 2014 - 10. September 2014 )In: Proc. International Conference on Adaptive and Intelligent Systems (ICAIS) 2014 10.1007/978-3-319-11298-5_10 https://www12.informatik.uni-erlangen.de/people/rwanka/publications/LSW14.php Download Lari V. , Tanase AP. , Hannig F. Teich J. Massively Parallel Processor Architectures for Resource-aware Computing First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing ) (Paderborn 29. Mai 2014 - 30. Mai 2014 )In: Proc. of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014) 2014 Download Lengauer C. , Apel S. , Bolten M. , Größlinger A. , Hannig F. Köstler H. , Rüde U. , Teich J. Grebhahn A. , Kronawitter S. , Kuckuk S. , Rittich H. , Schmitt C. :ExaStencils: Advanced Stencil-Code Engineering - First Project Report 2014 )http://www.fim.uni-passau.de/fileadmin/files/forschung/mip-berichte/MIP1401.pdf Download Lengauer C. , Apel S. , Größlinger A. , Grebhahn A. , Kronawitter S. , Bolten M. , Rittich H. , Hannig F. Köstler H. , Rüde U. , Teich J. Kuckuk S. , Schmitt C. :ExaStencils: Advanced Stencil-Code Engineering Euro-Par: Parallel Processing Workshops (Porto 25. August 2014 - 26. August 2014 )In: Proceedings of Euro-Par 2014: Parallel Processing Workshops , Berlin; Heidelberg 2014 10.1007/978-3-319-14313-2_47 http://link.springer.com/content/pdf/10.1007/978-3-319-14313-2_47.pdf Download Lukasiewycz M. , Glaß M. , Teich J. Chakraborty S. :Exploration of Distributed Automotive Systems using Compositional Timing Analysis In: Embedded Systems Development: From Functional Models to Implementations Berlin; Heidelberg Springer-Verlag 2014 , S. 189-204 ISBN: 978-1-4614-3878-6 Download Membarth R. , Reiche O. , Hannig F. Teich J. Code Generation for Embedded Heterogeneous Architectures on Android Conference on Design, Automation and Test in Europe (DATE) (Dresden 24. März 2014 - 28. März 2014 )In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE) 2014 10.7873/DATE2014.099 Download Membarth R. , Reiche O. , Schmitt C. , Hannig F. Teich J. Stürmer M. , Köstler H. :Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language Journal of Parallel and Distributed Computing 74 2014 ), S. 3191-3201 ISSN: 0743-7315 10.1016/j.jpdc.2014.08.008 Download Mühlenthaler M. , Wanka R. Fairness in Academic Course Timetabling Annals of Operations Research 2014 )ISSN: 0254-5330 10.1007/s10479-014-1553-2 Download Mühlenthaler M. , Wanka R. The Connectedness of Clash-free Timetables Int. Conf. on the Practice and Theory of Automated Timetabling (PATAT) (York, UK In: Proc. 10th Int. Conf. on the Practice and Theory of Automated Timetabling (PATAT) 2014 http://www12.cs.fau.de/people/rwanka/publications/MW14.php Download Narayanan V. , Teich J. Introduction to the special issue on domain-specific multicore computing Transactions on Embedded Computing Systems 13 2014 ), Art.Nr.: 129 ISSN: 1558-3465 10.1145/2588609 Download Paul J. , Stechele W. , Sousa É. , Lari V. , Hannig F. Teich J. Kröhnert M. , Asfour T. :Self-Adaptive Harris Corner Detection on Heterogeneous Many-core Processor 2014 8th Conference on Design and Architectures for Signal and Image Processing, DASIP 2014 (Madrid 8. Oktober 2014 - 10. Oktober 2014 )In: Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP) , Gières, France 2014 10.1109/DASIP.2014.7115616 Download Reiche O. , Schmid M. , Hannig F. Membarth R. , Teich J. Code Generation from a Domain-specific Language for C-based HLS of Hardware Accelerators International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (New Dehli 12. Oktober 2014 - 17. Oktober 2014 )In: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) , New York, NY, USA 2014 10.1145/2656075.2656081 Download Reimann F. , Glaß M. , Teich J. Cook A. , Gomez LR. , Ull D. , Wunderlich HJ. , Engelke P. , Abelein U. :Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures The 51st Annual Design Automation Conference (DAC) (San Francisco, CA 2. Juni 2014 - 5. Juni 2014 )In: Proc. of The 51st Annual Design Automation Conference (DAC) , New York, NY, USA 2014 10.1145/2593069.2602971 Download Roloff S. , Hannig F. Teich J. Towards Actor-oriented Programming on PGAS-based Multicore Architectures First International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) (Lübeck In: Proc. of the first International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) 2014 Download Rosales R. , Glaß M. , Teich J. Mahler: Sketch-based Model-driven Virtual Prototyping In: Proc. of the 27th International Conference on Architecture of Computing Systems (ARCS) New York, NY, USA IEEE Press 2014 , S. 85-97 (Lecture Notes in Computer Science, Bd.8350)ISBN: 978-3-319-04890-1 10.1007/978-3-319-04891-8_8 Download Rosales R. , Glaß M. , Teich J. Wang B. , Xu Y. , Hasholzner R. :MAESTRO - Holistic Actor-oriented Modeling of Non-Functional Properties and Firmware Behavior for MPSoCs ACM Transactions on Design Automation of Electronic Systems 19 2014 ), S. 23:1-23:26 ISSN: 1084-4309 10.1145/2594481 Download Schlichtmann U. , Kleeberger VB. , Abraham JA. , Evans A. , Gimmler-Dumon C. , Glaß M. , Herkersdorf A. , Nassif SR. , Wehn N. :Connecting Different Worlds - Technology Abstraction for Reliability-Aware Design and Test Design, Automation and Test in Europe (DATE) (Dresden 24. März 2014 - 28. März 2014 )In: Proc. of Design, Automation and Test in Europe (DATE) , New York, NY, USA 2014 10.7873/DATE2014.265 Download Schmid M. , Apelt N. , Hannig F. Teich J. An Image Processing Library for C-based High-Level Synthesis Field-Programmable Logic and Applications (FPL) (Munich 1. September 2014 - 5. September 2014 )In: Proc. of Field-Programmable Logic and Applications (FPL) , New York, NY, USA 2014 10.1109/FPL.2014.6927424 Download Schmid M. , Hannig F. Tanase AP. , Teich J. High-Level Synthesis Revised - Generation of FPGA Accelerators from a Domain-Specific Language using the Polyhedron Model In: Parallel Computing: Accelerating Computational Science and Engineering (CSE) Amsterdam, The Netherlands IOS Press 2014 , S. 497-506 (Advances in Parallel Computing, Bd.25)ISBN: 978-1-61499-380-3 10.3233/978-1-61499-381-0-497 Download Schmid M. , Reiche O. , Schmitt C. , Hannig F. Teich J. Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs First International Workshop on FPGAs for Software Programmers (FSP) (Munich 1. September 2014 - 1. September 2014 )In: Proc. of the First International Workshop on FPGAs for Software Programmers (FSP) 2014 http://arxiv.org/abs/1408.4721 Download Schmid M. , Tanase AP. , Hannig F. Teich J. Bhadouria VS. , Ghoshal D. :Domain-Specific Augmentations for High-Level Synthesis 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Zurich 18. Juni 2014 - 20. Juni 2014 )In: Proc. of the 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) , New York, NY, USA 2014 10.1109/ASAP.2014.6868653 Download Schmidt B. , Ziener D. , Teich J. An automatic netlist and floorplanning approach to improve the MTTR of scrubbing techniques 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '14 (Monterey, CA 26. Februar 2014 - 28. Februar 2014 )In: In Proceedings of 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '14 2014 Download Schmidt B. , Ziener D. , Teich J. Minimizing Scrubbing Effort through Automatic Netlist Partitioning and Floorplanning Reconfigurable Architectures Workshop (RAW) (Phoenix 19. Mai 2014 - 23. Mai 2014 )In: Proc. of the Reconfigurable Architectures Workshop (RAW) 2014 10.1109/IPDPSW.2014.41 Download Schmitt C. , Kuckuk S. , Hannig F. Köstler H. , Teich J. ExaSlang: A Domain-Specific Language for Highly Scalable Multigrid Solvers 4th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC) (New Orleans, LA, USA 17. November 2014 - 17. November 2014 )In: Proc. of the 4th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC) , New York, NY, USA 2014 10.1109/WOLFHPC.2014.11 Download Schmitt C. , Kuckuk S. , Köstler H. , Hannig F. Teich J. An Evaluation of Domain-Specific Language Technologies for Code Generation 14th International Conference on Computational Science and its Applications (ICCSA) (Minho, Guimaraes 30. Juni 2014 - 3. Juli 2014 )In: Proc. of the 14th International Conference on Computational Science and its Applications (ICCSA) , New York, NY, USA 2014 10.1109/ICCSA.2014.16 Download Seyler J. , Rahimov S. , Streichert T. , Glaß M. , Teich J. DPSK modulated wakeup mechanism for point-to-point networks with partial network support 9th IEEE International Symposium on Industrial Embedded Systems, SIES 2014 (Pisa In: Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems (SIES) 2014 10.1109/SIES.2014.6871209 Download Seyler JR. , Streichert T. , Warkentin J. , Spägele M. , Glaß M. , Teich J. A self-propagating wakeup mechanism for point-to-point networks with partial network support 17th Design, Automation and Test in Europe, DATE 2014 (Dresden 24. März 2014 - 28. März 2014 )In: Proceedings of Design, Automation and Test in Europe (DATE 2014) 2014 10.7873/DATE2014.019 Download Sousa É. , Gangadharan D. , Hannig F. Teich J. Runtime reconfigurable bus arbitration for concurrent applications on heterogeneous MPSoC architectures 17th Euromicro Conference on Digital System Design, DSD 2014 (Verona 27. August 2014 - 29. August 2014 )In: Proceedings of the EUROMICRO Digital System Design Conference (DSD) 2014 10.1109/DSD.2014.105 Download Sousa É. , Paul J. , Lari V. , Hannig F. Teich J. Stechele W. :Resource-Aware Computer Vision Application on Heterogeneous Multi-Tile Architecture. Hardware and Software Demo at the University Booth at Design, Automation and Test in Europe (DATE) (Dresden 24. März 2014 - 28. Dezember 2017 )In: Hardware and Software Demo at the University Booth at Design, Automation and Test in Europe (DATE) 2014 https://www.date-conference.com/system/files/file/date14/ubooth/2615.pdf https://www.date-conference.com/system/files/file/date14/ubooth/2615.pdf Download Tanase AP. , Witterauf M. , Teich J. Hannig F. Symbolic inner loop parallelisation for massively parallel processor arrays 12th ACM/IEEE International Conference on Methods and Models for System Design, MEMOCODE 2014 (Lausanne 19. Oktober 2014 - 21. Oktober 2014 )In: Proceedings of the 12th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) 2014 10.1109/MEMCOD.2014.6961865 Download Tate A. , Kamil A. , Dubey A. , Größlinger A. , Chamberlain B. , Goglin B. , Edwards CH. , Newburn C. , Padua D. , Unat D. , Jeannot E. , Hannig F. Gysi T. , Ltaief H. , Sexton J. , Labarta J. , Shalf J. , Fürlinger K. , O’Brien K. , Linardakis L. , Besta M. , Sawley MC. , Abraham M. , Bianco M. , Pericàs M. , Maruyama N. , Kelly PHJ. , Messmer P. , Ross RB. , Cledat R. , Matsuoka S. , Schulthess T. , Hoefler T. , Leung VJ. :White Paper: Programming Abstractions for Data Locality PADAL Workshop 2014 (Swiss National Supercomputing Center (CSCS), Lugano, Switzerland 28. April 2014 - 29. April 2014 )In: Proc. of PADAL Workshop 2014 http://www.padalworkshop.org/white-paper/ Download Teich J. Tanase AP. , Hannig F. Symbolic Mapping of Loop Programs onto Processor Arrays In: Journal of Signal Processing Systems Berlin; Heidelberg Springer-Verlag 2014 , S. 31-59 10.1007/s11265-014-0905-0 Download Wang B. , Xu Y. , Rosales R. , Hasholzner R. , Glaß M. , Teich J. End-to-End Power Estimation for Heterogeneous Cellular LTE SoCs in Early Design Phases International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Palma de Mallorca 29. September 2014 - 1. Oktober 2014 )In: Proceedings of the International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2014 10.1109/PATMOS.2014.6951904 Download Weichslgartner A. , Gangadharan D. , Wildermann S. Glaß M. , Teich J. DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systems 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014 (New Delhi 12. Oktober 2014 - 17. Oktober 2014 )In: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2014) 2014 10.1145/2656075.2656083 Download Weichslgartner A. , Teich J. The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure First International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) (Lübeck In: Proc. of the first International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS) 2014 Download Wildermann S. Glaß M. , Teich J. Multi-Objective Distributed Run-time Resource Management for Many-Cores Design, Automation and Test in Europe (DATE) (Dresden 24. März 2014 - 28. März 2014 )In: Proc. of Design, Automation and Test in Europe (DATE) , New York, NY, USA 2014 10.7873/DATE2014.234 Download Wildermann S. Teich J. Self-Integration for Virtualization of Embedded Many-Core Systems Workshop on Self-Improving System Integration (SISSY 2014) (London 8. September 2014 - 8. September 2014 )In: Proceedings of the Workshop on Self-Improving System Integration (SISSY 2014) 2014 Download Xu Y. , Wang B. , Teich J. Parametric Yield Optimization Using Leakage-Yield-Driven Floorplanning International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Palma de Mallorca 29. September 2014 - 1. Oktober 2014 )In: Proceedings of the International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2014 10.1109/PATMOS.2014.6951860 Download Zebelein C. , Haubelt C. , Falk J. Schwarzer T. , Teich J. Model-based actor multiplexing with application to complex communication protocols 17th Design, Automation and Test in Europe, DATE 2014 (Dresden 24. März 2014 - 28. März 2014 )In: Proceedings of Design, Automation and Test in Europe (DATE 2014) 2014 10.7873/DATE2014.229 Download Zhang L. , Falk J. Schwarzer T. , Glaß M. , Teich J. Communication-driven Automatic Virtual Prototyping for Networked Embedded Systems Euromicro Conference on Digital System Design (DSD) (Verona 27. August 2014 - 29. August 2014 )In: Proc. of Euromicro Conference on Digital System Design (DSD) , New York, NY, USA 2014 Download
2013 Aliee H. , Glaß M. , Reimann F. , Teich J. Automatic Success Tree-Based Reliability Analysis for the Consideration of Transient and Permanent Faults Design, Automation and Test in Europe (DATE) (Grenoble 18. März 2013 - 22. März 2013 )In: Proc. Design, Automation and Test in Europe , New York, NY, USA 2013 10.7873/DATE.2013.329 Download Andres B. , Gebser M. , Schaub T. , Haubelt C. , Reimann F. , Glaß M. :Symbolic system synthesis using answer set programming 12th International Conference on Logic Programming and Nonmonotonic Reasoning, LPNMR 2013 (Corunna 15. September 2013 - 19. September 2013 )In: Proceedings of the 12th International Conference on Logic Programming and Nonmonotonic Reasoning (LPNMR) 2013 10.1007/978-3-642-40564-8_9 Download Andres B. , Schaub T. , Gebser M. , Haubelt C. , Reimann F. , Glaß M. :A Combined Mapping and Routing Algorithm for 3D NoCs Based on ASP Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) (Rostock 12. März 2013 - 14. März 2013 )In: Proceedings of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) 2013 Download Angermeier J. :Concepts and Algorithms to Increase the Efficiency and Reliability of Reconfigurable Computer 2013 )Download Biglari M. , Qasemi E. , Pourmohseni B. :Maestro: A High Performance AES Encryption/Decryption System International Symposium on Computer Architecture and Digital Systems (CADS) (Tehran 30. Oktober 2013 - 31. Oktober 2013 )In: Proceedings of the 17th CSI International Symposium on Computer Architecture and Digital Systems (CADS) 2013 10.1109/CADS.2013.6714255 https://ieeexplore.ieee.org/document/6714255/ Download Boppu S. , Hannig F. Teich J. Loop Program Mapping and Compact Code Generation for Programmable Hardware Accelerators 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) (Washington, DC 5. Juni 2013 - 7. Juni 2013 )In: Proc. 24th International Conference on Application-Specific Systems, Architectures and Processors , New York, NY, USA 2013 10.1109/ASAP.2013.6567544 Download Boppu S. , Lari V. , Hannig F. Teich J. Transactor-based Prototyping of Heterogeneous Multiprocessor System-On-Chip Architectures Synopsys Users Group Conference (SNUG) (Munich 14. Mai 2013 - 14. Mai 2013 )In: Proc. Synopsys Users Group Conference 2013 Download Dennl C. , Ziener D. , Teich J. Acceleration of SQL Restrictions and Aggregations through FPGA-based Dynamic Partial Reconfiguration IEEE International Field-Programmable Custom Computing Machines Symposium (FCCM) (Seattle 28. April 2013 - 30. April 2013 )In: Proc. IEEE International Field-Programmable Custom Computing Machines Symposium 2013 10.1109/FCCM.2013.38 Download Falk J. Haubelt C. , Teich J. Integrated Modeling Using Finite State Machines and Dataflow Graphs In: huvra S. Bhattacharyya and Ed F. Deprettere and Rainer Leupers and Jarmo Takala (Hrsg.): Handbook of Signal Processing Systems 2013 , S. 975-2013 10.1007/978-1-4614-6859-2_30 Download Falk J. Haubelt C. , Zebelein C. , Teich J. Integrated Modeling Using Finite State Machines and Dataflow Graphs In: Bhattacharyya S., Deprettere E., Leupers R., Takala J. (Hrsg.): Handbook of Signal Processing Systems New York, NY Springer 2013 ISBN: 978-1-4614-6858-5 10.1007/978-1-4614-6859-2_30 Download Falk J. Zebelein C. , Haubelt C. , Teich J. A Rule-Based Quasi-Static Scheduling Approach for Static Islands in Dynamic Dataflow Graphs In: ACM Transactions on Embedded Computing Systems New York, NY ACM 2013 , S. 74:1-74:31 10.1145/2442116.2442124 Download Falk J. Zebelein C. , Haubelt C. , Teich J. A rule-based quasi-static scheduling approach for static islands in dynamic dataflow graphs ACM Transactions on Embedded Computing Systems 12 2013 ), Art.Nr.: 74 ISSN: 1539-9087 10.1145/2442116.2442124 Download Gladigau J. :Combining Formal Model-Based System-Level Design with SystemC Transaction Level Modeling 2013 )Download Glock S. , Rosales R. , Reutelhuber F. , Glaß M. , Teich J. Fischer G. , Weigel R. , Ußmüller T. :Scenario-Based Energy Estimation of Heterogeneous Integrated Systems at System Level 43rd European Microwave Conference (EuMC) (Nuremberg 7. Oktober 2013 - 10. Oktober 2013 )In: Proc. 43rd European Microwave Conference 2013 Download Graf S. , Glaß M. , Teich J. Investigating the Impact of Energy-Efficient Ethernet on Automotive Applications via High-level Modeling Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) (Warnemünde 12. März 2013 - 14. März 2013 )In: Tagungsunterlagen Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen , Rostock 2013 Download Graf S. , Glaß M. , Wintermann D. , Teich J. Lauer C. :IVaM: Implicit Variant Modeling and Management for Automotive Embedded Systems International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Montreal, QC 29. September 2013 - 4. Oktober 2013 )In: Proc. International Conference on Hardware/Software Codesign and System Synthesis , New York, NY, USA 2013 10.1109/CODES-ISSS.2013.6658982 Download Hannig F. Schmid M. , Lari V. , Boppu S. , Teich J. System Integration of Tightly-Coupled Processor Arrays using Reconfigurable Buffer Structures ACM International Conference on Computing Frontiers (CF) (Ischia 14. Mai 2013 - 16. Mai 2013 )In: Proc. ACM International Conference on Computing Frontiers , New York, NY, USA 2013 10.1145/2482767.2482770 Download Heisswolf J. , Weichslgartner A. , Zaib A. , König R. , Wild T. , Herkersdorf A. , Teich J. Becker J. :Hardware Supported Adaptive Data Collection for Networks on Chip IEEE 27th International Parallel and Distributed Processing Symposium Workshops PhD Forum (IPDPSW) (Boston, Massachusetts 20. Mai 2013 - 24. Mai 2013 )In: Proc. IEEE 27th International Parallel and Distributed Processing Symposium Workshops PhD Forum , Red Hook, NY, USA 2013 10.1109/IPDPSW.2013.124 Download Heisswolf J. , Zaib A. , Weichslgartner A. , König R. , Wild T. , Teich J. Herkersdorf A. , Becker J. :Virtual Networks - Distributed Communication Resource Management ACM Transactions on Reconfigurable Technology and Systems 6 2013 ), S. 8:1-8:14 ISSN: 1936-7406 10.1145/2492186 Download Henkel J. , Narayanan V. , Parameswaran S. , Teich J. Run-time adaption for highly-complex multi-core systems 11th ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013 (Montreal, QC 29. September 2013 - 4. Oktober 2013 )10.1109/CODES-ISSS.2013.6659000 Download Herkersdorf A. , Engel M. , Glaß M. , Henkel J. , Kleeberger VB. , Kochte MA. , Kühn JM. , Nassif SR. , Rauchfuss H. , Rosenstiel W. , Schlichtmann U. , Shafique M. , Tahoori MB. , Teich J. Wehn N. , Weis C. , Wunderlich HJ. :Cross-Layer Dependability Modeling and Abstraction in System on Chip 9th Workshop on Silicon Errors in Logic - System Effects (SELSE) (Palo Alto, CA 26. März 2013 - 27. März 2013 )In: Proc. 9th Workshop on Silicon Errors in Logic - System Effects , München 2013 http://www.selse.org Download Kern A. :Ethernet and IP for Automotive E/E-Architectures - Technology, Analysis, Migration Concepts and Infrastructure 2013 )Download Membarth R. :Code Generation for GPU Accelerators from a Domain-Specific Language for Medical Imaging 2013 )Download Mostaghim S. , Teich J. Strategies for finding good local guides in multi-objective particle swarm optimization (MOPSO) 2003 IEEE Swarm Intelligence Symposium, SIS 2003 10.1109/SIS.2003.1202243 Download Mühlenthaler M. , Wanka R. A Decomposition of the Max-min Fair Curriculum-based Course Timetabling Problem: The Impact of Solving Subproblems to Optimality 6th Multidisciplinary International Scheduling Conference: Theory and Applications (MISTA) (Gent In: Proc. 6th Multidisciplinary International Scheduling Conference: Theory and Applications 2013 http://www12.informatik.uni-erlangen.de/people/rwanka/publications/MW13.php Download Pourmohseni B. , Eshghi M. :Reliable Energy-Efficient Dynamic TDMA MAC Protocol for Wireless Body Area Networks International journal of application or innovation in engineering & management 2013 )ISSN: 2319-4847 Download Reimann F. , Glaß M. , Teich J. Migration Strategies for Ethernet-based E/E Architectures Embedded World Conference (Nuremberg 26. Februar 2013 - 28. Februar 2013 )In: Proc. Embedded World Conference , Nuremberg, Germany 2013 Download Reimann F. , Glaß M. , Teich J. Abelein U. :Szenarienbasierte Integration von Diagnosefunktionalität in E/E Architekturen Automotive meets Electronics (AmE) (Dortmund 19. Februar 2013 - 20. Februar 2013 )In: Proc. Automotive meets Electronics, GMM Fachbericht 75 , Berlin, Germany 2013 Download Reimann F. , Graf S. , Streit F. , Glaß M. , Teich J. Timing Analysis of Ethernet AVB-based Automotive E/E Architectures IEEE International Conference on Emerging Technology & Factory Automation (ETFA) (Cagliari 10. September 2013 - 13. September 2013 )In: Proc. IEEE International Conference on Emerging Technology & Factory Automation , Red Hook, NY, USA 2013 10.1109/ETFA.2013.6648024 http://www.etfa2013.org Download Roloff S. , Weichslgartner A. , Heißwolf J. , Hannig F. Teich J. NoC Simulation in Heterogeneous Architectures for PGAS Programming Model 16th International Workshop on Software and Compilers for Embedded Systems (M-SCOPES) (St. Goar 19. Juni 2013 - 21. Juni 2013 )In: Proc. 16th International Workshop on Software and Compilers for Embedded Systems , New York, NY, USA 2013 10.1145/2463596.2463606 Download Schmid M. , Blocherer M. , Hannig F. Teich J. Real-Time Range Image Preprocessing on FPGAs International Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancun 9. Dezember 2013 - 11. Dezember 2013 )In: Proc. International Conference on Reconfigurable Computing and FPGAs 2013 10.1109/ReConFig.2013.6732325 Download Schmitt M. , Wanka R. Exploiting Independent Subformulas: A Faster Approximation Scheme for #k-SAT Information Processing Letters 113 2013 ), S. 337-344 ISSN: 0020-0190 10.1016/j.ipl.2013.02.013 Download Schmitt M. , Wanka R. Particles Prefer Walking Along the Axes: Experimental Insights into the Behavior of a Particle Swarm Genetic and Evolutionary Computation Conference (GECCO) (Amsterdam 6. Juli 2013 - 10. Juli 2013 )In: Companion of Proc. 15th Genetic and Evolutionary Computation Conference 2013 10.1145/2464576.2464583 Download Schmitt M. , Wanka R. Particle Swarm Optimization Almost Surely Finds Local Optima Genetic and Evolutionary Computation Conference (GECCO) (Amsterdam In: Proc. 15th Genetic and Evolutionary Computation Conference 2013 10.1145/2463372.2463563 Download Sousa É. , Tanase AP. , Hannig F. Teich J. Accuracy and Performance Analysis of Harris Corner Computation on Tightly-Coupled Processor Arrays 2013 Conference on Design and Architectures for Signal and Image Processing (DASIP) (Cagliari 8. Oktober 2013 - 10. Oktober 2013 )In: Proc. 2013 Conference on Design and Architectures for Signal and Image Processing , New York, NY, USA 2013 Download Sousa É. , Tanase AP. , Hannig F. Teich J. A Prototype of an Adaptive Computer Vision Algorithm on MPSoC Architecture 2013 Conference on Design and Architectures for Signal and Image Processing (DASIP) (Cagliari 8. Oktober 2013 - 10. Oktober 2013 )In: Proc. 2013 Conference on Design and Architectures for Signal and Image Processing , New York, NY, USA 2013 Download Sousa É. , Tanase AP. , Lari V. , Hannig F. Teich J. Paul J. , Stechele W. , Kröhnert M. , Asfour T. :Acceleration of Optical Flow Computations on Tightly-Coupled Processor Arrays 25th Workshop on Parallel Systems and Algorithms (PARS) (Erlangen In: Proc. 25th Workshop on Parallel Systems and Algorithms , Berlin, Germany 2013 Download Tanase AP. , Lari V. , Hannig F. Teich J. Exploitation of Quality/Throughput Tradeoffs in Image Processing through Invasive Computing International Conference on Parallel Computing (ParCo) (Munich 10. September 2013 - 13. September 2013 )In: Proc. International Conference on Parallel Computing 2013 Download Teich J. Schröder-Preikschat W. , Herkersdorf A. :Invasive Computing - Common Terms and Granularity of Invasion Cornell Cornell University Library 2013 http://arxiv.org/pdf/1304.6067v1.pdf Download Teich J. Tanase AP. , Hannig F. Symbolic Parallelization of Loop Programs for Massively Parallel Processor Arrays 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) (Washington, DC 5. Juni 2013 - 7. Juni 2013 )In: Proc. 24th International Conference on Application-Specific Systems, Architectures and Processors , New York, NY, USA 2013 10.1109/ASAP.2013.6567543 Download Wildermann S. Teich J. Decomposing Run-time Resource Management in Heterogeneous Reconfigurable Systems Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) (Porto In: Proc. Workshop on Self-Awareness in Reconfigurable Computing Systems 2013 Download Wildermann S. Ziermann T. , Teich J. Game-Theoretic Analysis of Decentralized Core Allocation Schemes on Many-core Systems Design, Automation and Test in Europe (DATE) (Grenoble 18. März 2013 - 22. März 2013 )In: Proc. Design, Automation and Test in Europe , New York, NY, USA 2013 10.7873/DATE.2013.305 Download Xu Y. , Wang B. , Hasholzner R. , Rosales R. , Teich J. On robust task-accurate performance estimation 50th Annual Design Automation Conference, DAC 2013 (Austin, TX 2. Juni 2013 - 6. Juni 2013 )In: Proceedings of the 50th Design Automation Conference (DAC 2013) 2013 10.1145/2463209.2488945 Download Xu Y. , Wang B. , Rosales R. , Hasholzner R. , Teich J. On confident task-accurate performance estimation 26th International Conference on Architecture of Computing Systems, ARCS 2013 (Prague In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS) 2013 10.1007/978-3-642-36424-2_3 Download Zaib A. , Heisswolf J. , Weichslgartner A. , Wild T. , Teich J. Becker J. , Herkersdorf A. :AUTO-GS: Self-optimization of NoC Traffic Through Hardware Managed Virtual Connections 16th Euromicro Conference on Digital System Design (Cantabria 4. September 2013 - 6. September 2013 )In: Proc. 16th Euromicro Conference on Digital System Design 2013 10.1109/DSD.2013.87 Download Zebelein C. , Haubelt C. , Falk J. Schwarzer T. , Teich J. Representing mapping and scheduling decisions within dataflow graphs 2013 16th Forum on Specification and Design Languages, FDL 2013 (Paris 24. September 2013 - 26. September 2013 )In: Proceedings of Forum on Specification & Design Languages (FDL 2013) 2013 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84891286674&origin=inward Download Zebelein C. , Haubelt C. , Falk J. Teich J. Model-Based Representation of Schedules for Dataflow Graphs Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2013) (Rostock 12. März 2013 - 14. März 2013 )In: Proceedings of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2013) 2013 Download Zhang L. , Glaß M. , Ballmann N. , Teich J. Bridging Algorithm and ESL Design: Matlab/Simulink Model Transformation and Validation Forum on Specification & Design Languages (FDL) (Paris 24. September 2013 - 26. September 2013 )In: Proc. Forum on Specification & Design Languages , New York, NY, USA 2013 Download Ziermann T. , Salcic Z. , Teich J. HW/SW Tradeoffs for Dynamic Message Scheduling in Controller Area Network (CAN) 26th International Conference on Architecture of Computing Systems (ARCS) (Prague 19. Februar 2013 - 22. Februar 2013 )In: Proc. 26th International Conference on Architecture of Computing Systems , New York, NY, USA 2013 10.1007/978-3-642-36424-2_14 Download Ziermann T. , Wildermann S. Teich J. Self-organizing Core Allocation Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware (PARS) (Erlangen 11. April 2013 - 12. April 2013 )In: Proc. Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware 2013 Download
2012 Aliee H. , Zarandi HR. :A Fast and Accurate Fault Tree Analysis Based on Stochastic Logic Implemented on Field-Programmable Gate Arrays IEEE Transactions on Reliability 62 2012 ), S. 13-22 ISSN: 0018-9529 10.1109/TR.2012.2221012 Download Berndt R. , Bazan P. , Hielscher KS. , German R. , Lukasiewycz M. :Multi-Valued Decision Diagrams for the Verification of Consistency in Automotive Product Data QSIC 2012 (Xi'an 27. August 2012 - 29. August 2012 )In: Proceedings of 12th International Conference on Quality Software (IEEE) 2012 10.1109/QSIC.2012.43 http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6319247 Download Dennl C. , Ziener D. , Teich J. On-the-fly Composition of FPGA-Based SQL Query Accelerators Using A Partially Reconfigurable Module Library IEEE International Field-Programmable Custom Computing Machines Symposium (FCCM) (Toronto 29. April 2012 - 1. Mai 2012 )In: Proc. of the IEEE International Field-Programmable Custom Computing Machines Symposium (FCCM) , New York, NY, USA 2012 10.1109/FCCM.2012.18 Download Eberl M. , Glaß M. , Teich J. Abelein U. :Considering Diagnosis Functionality during Automatic System-Level Design of Automotive Networks The 49th Annual Design Automation Conference 2012 (DAC) (San Francisco, CA 3. Juni 2012 - 7. Juni 2012 )In: Proc. of The 49th Annual Design Automation Conference 2012 (DAC) , New York, NY, USA 2012 10.1145/2228360.2228400 Download Farbeh H. , Fazeli M. , Khosravi F. , Miremadi SG. :Memory mapped SPM: Protecting instruction scratchpad memory in embedded systems against soft errors 9th European Dependable Computing Conference, EDCC 2012 (Sibiu 8. Mai 2012 - 11. Mai 2012 )In: Proceedings of the 9th European Dependable Computing Conference (EDCC 2012) 2012 10.1109/EDCC.2012.13 Download Fekete SP. , Kamphans T. , Schweer N. , Tessars C. , Van Der Veen JC. , Angermeier J. , Koch D. , Teich J. Dynamic Defragmentation of Reconfigurable Devices ACM Transactions on Reconfigurable Technology and Systems 5 2012 ), S. 1-20 ISSN: 1936-7406 10.1145/2209285.2209287 Download Gerndt M. , Hannig F. Herkersdorf A. , Hollmann A. , Meyer M. , Roloff S. , Weidendorfer J. , Wild T. , Zaib A. :An Integrated Simulation Framework for Invasive Computing Forum on Specification & Design Languages (FDL) (Vienna 18. September 2012 - 20. September 2012 )In: Proc. of the Forum on Specification & Design Languages (FDL) , New York, NY, USA 2012 Download Gladigau J. , Haubelt C. , Teich J. Model-Based Virtual Prototype Acceleration IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31 2012 ), S. 1572-1585 ISSN: 0278-0070 10.1109/TCAD.2012.2205148 Download Glaß M. , Teich J. Zhang L. :A Co-simulation Approach for System-Level Analysis of Embedded Control Systems 2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) (Samos 16. Juli 2012 - 19. Juli 2012 )In: Proc. of the 2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) , New York, NY, USA 2012 10.1109/SAMOS.2012.6404200 Download Glaß M. , Yu H. , Reimann F. , Teich J. Cross-Level Compositional Reliability Analysis for Embedded Systems 31st International Conference on Computer Safety, Reliability, and Security (SAFECOMP) (Magdeburg 25. September 2012 - 28. September 2012 )In: Proc. of the 31st International Conference on Computer Safety, Reliability, and Security (SAFECOMP) , Berlin; Heidelberg 2012 10.1007/978-3-642-33678-2_10 Download Graf S. , Glaß M. , Teich J. Unreliable Data Transmissions and Limited Hardware Communication Buffers in Automotive E/E Virtual Prototypes Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) (Kaiserslautern 5. März 2012 - 7. März 2012 )In: Tagungsunterlagen Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) , Hamburg, Germany 2012 Download Graf S. , Russ T. , Glaß M. , Teich J. Considering MOST150 during Virtual Prototyping of Automotive E/E Architectures Automotive meets Electronics (AmE), GMM Fachbericht 72 (Dortmund In: Proc. of Automotive meets Electronics (AmE), GMM Fachbericht 72 , Berlin, Germany 2012 Download Heisswolf J. , Zaib A. , Weichslgartner A. , König R. , Wild T. , Teich J. Herkersdorf A. , Becker J. :Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW) (Shanghai 21. Mai 2012 - 25. Mai 2012 )In: Proc. of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW) , New York, NY, USA 2012 10.1109/IPDPSW.2012.25 Download Henkel J. , Herkersdorf A. , Bauer L. , Wild T. , Hübner M. , Pujari RK. , Grudnitsky A. , Heisswolf J. , Zaib A. , Vogel B. , Lari V. , Kobbe S. :Invasive Manycore Architectures 17th Asia and South Pacific Design Automation Conference (ASP-DAC) (Sydney 30. Januar 2012 - 2. Februar 2012 )In: Proc. of the 17th Asia and South Pacific Design Automation Conference (ASP-DAC) , New York, NY, USA 2012 10.1109/ASPDAC.2012.6164944 Download Kiesel R. , Streubühr M. , Haubelt C. , Terzis A. , Teich J. Virtual prototyping for efficient multi-core ECU development of driver assistance systems 2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2012 (Samos 16. Juli 2012 - 19. Juli 2012 )In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XII) 2012 10.1109/SAMOS.2012.6404155 Download Koch D. , Torresen J. , Beckhoff C. , Ziener D. , Dennl C. , Breuer V. , Teich J. Feilen M. , Stechele W. :Partial Reconfiguration on FPGAs in Practice - Tools and Applications 25th International Conference on Architecture of Computing Systems (ARCS) (Munich 28. Februar 2012 - 2. März 2012 )In: Proc. of the 25th International Conference on Architecture of Computing Systems (ARCS) , New York, NY, USA 2012 Download Lari V. , Muddasani S. , Boppu S. , Hannig F. Schmid M. , Teich J. Hierarchical Power Management for Adaptive Tightly-Coupled Processor Arrays ACM Transactions on Design Automation of Electronic Systems 18 2012 ), S. 1-25 ISSN: 1084-4309 10.1145/2390191.2390193 Download Lari V. , Muddasani S. , Boppu S. , Hannig F. Teich J. Design of low power on-chip processor arrays 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2012 (Delft 9. Juli 2012 - 11. Juli 2012 )In: Proceedings of the 23rd IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) 2012 10.1109/ASAP.2012.10 Download Lukasiewycz M. , Glaß M. , Teich J. Milbredt P. :FlexRay Static Segment Scheduling In: Advances in Real-Time Systems Berlin; Heidelberg Springer-Verlag 2012 , S. 323-339 ISBN: 978-3-642-24348-6 Download Membarth R. , Hannig F. Teich J. Körner M. , Eckert W. :Automatic Optimization of In-Flight Memory Transactions for GPU Accelerators based on a Domain-Specific Language for Medical Imaging 11th International Symposium on Parallel and Distributed Computing (ISPDC) (Munich 25. Juni 2012 - 29. Juni 2012 )In: Proc. of the 11th International Symposium on Parallel and Distributed Computing (ISPDC) , New York, NY, USA 2012 10.1109/ISPDC.2012.36 Download Membarth R. , Hannig F. Teich J. Körner M. , Eckert W. :Generating Device-specific GPU Code for Local Operators in Medical Imaging 26th IEEE International Parallel and Distributed Processing Symposium (IPDPS) (Shanghai 21. Mai 2012 - 25. Mai 2012 )In: Proc. of the 26th IEEE International Parallel and Distributed Processing Symposium (IPDPS) , New York, NY, USA 2012 10.1109/IPDPS.2012.59 Download Membarth R. , Hannig F. Teich J. Körner M. , Eckert W. :Mastering Software Variant Explosion for GPU Accelerators In: Proceedings of the 10th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar) Berlin; Heidelberg Springer 2012 , S. 123-132 (Lecture Notes on Computer Science (LNCS)) 10.1007/978-3-642-36949-0_15 Download Membarth R. , Hannig F. Teich J. Köstler H. :Towards Domain-specific Computing for Stencil Codes in HPC 2nd International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC) (Salt Lake City, UT 10. November 2012 - 16. November 2012 )In: Proceedings of the 2nd International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC) 2012 10.1109/SC.Companion.2012.136 Download Membarth R. , Lupp JH. , Hannig F. Teich J. Körner M. , Eckert W. :Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imaging 25th International Conference on Architecture of Computing Systems (ARCS) (Munich 28. Februar 2012 - 2. März 2012 )In: Proc. of the 25th International Conference on Architecture of Computing Systems (ARCS) , New York, NY, USA 2012 10.1007/978-3-642-28293-5_13 Download Milbredt P. , Glaß M. , Lukasiewycz M. , Steininger A. , Teich J. Designing FlexRay-based Automotive Architectures: A Holistic OEM Approach Design, Automation and Test in Europe (DATE) (Dresden, Germany 12. März 2012 - 16. März 2012 )In: Proc. of Design, Automation and Test in Europe (DATE) , New York, NY, USA 2012 Download Muddasani S. , Boppu S. , Hannig F. Kuzmin B. , Lari V. , Teich J. A Prototype of an Invasive Tightly-Coupled Processor Array 2012 Conference on Design and Architectures for Signal and Image Processing (DASIP) (Karlsruhe 23. Oktober 2012 - 25. Oktober 2012 )In: Proc. of the 2012 Conference on Design and Architectures for Signal and Image Processing (DASIP) , New York, NY, USA 2012 Download Mühlenthaler M. , Wanka R. Fairness in Academic Timetabling 9th Int. Conf. on the Practice and Theory of Automated Timetabling (PATAT) (Son 28. August 2012 - 31. August 2012 )In: Proc. 9th Int. Conf. on the Practice and Theory of Automated Timetabling (PATAT) 2012 Download Riess C. , Strehl V. , Wanka R. The Spectral Relation between the Cube-Connected Cycles and the Shuffle-Exchange Network 10th Workshop on Parallel Systems and Algorithms (PASA) of the 25th Int. Conf. on Architecture of Computing Systems (ARCS) (München In: GI (Hrsg.): Proc. 10th Workshop on Parallel Systems and Algorithms (PASA) of the 25th Int. Conf. on Architecture of Computing Systems (ARCS) 2012 Download Roloff S. , Hannig F. Teich J. Approximate Time Functional Simulation of Resource-Aware Programming Concepts for Heterogeneous MPSoCs 17th Asia and South Pacific Design Automation Conference (ASP-DAC) (Sydney 30. Januar 2012 - 2. Februar 2012 )In: Proc. of the 17th Asia and South Pacific Design Automation Conference (ASP-DAC) , New York, NY, USA 2012 10.1109/ASPDAC.2012.6164943 Download Roloff S. , Hannig F. Teich J. Fast Architecture Evaluation of Heterogeneous MPSoCs by Host-Compiled Simulation 15th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Schloss Rheinfels, St. Goar 15. Mai 2012 - 16. Mai 2012 )In: Proc. of the 15th International Workshop on Software and Compilers for Embedded Systems (SCOPES) , New York, NY, USA 2012 10.1145/2236576.2236582 Download Roloff S. , Hannig F. Teich J. Simulation of Resource-Aware Applications on Heterogeneous Architectures 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) (Fiuggi 8. Juli 2012 - 14. Juli 2012 )In: Proc. of the 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) , Ghent, Belgium 2012 Download Rosales R. , Klie T. Glock S. , Xu Y. , Wang B. , Hasholzner R. , Teich J. Weigel R. :Eine Aktor-Orientierte Methodik zur Power-Modellierung auf Systemebene Design & Elektronik 2012 ), S. 1-9 ISSN: 0933-8667 Download Schmid M. , Hannig F. Teich J. Power Management Strategies for Serial RapidIO Endpoints in FPGAs IEEE International Field-Programmable Custom Computing Machines Symposium (FCCM) (Toronto 29. April 2012 - 1. Mai 2012 )In: Proc. of the IEEE International Field-Programmable Custom Computing Machines Symposium (FCCM) , New York, NY, USA 2012 10.1109/FCCM.2012.26 Download Tanase AP. , Hannig F. Teich J. Symbolic loop parallelization of static control programs 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) (Fiuggi 8. Juli 2012 - 14. Juli 2012 )In: Proc. of the 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) , Ghent, Belgium 2012 Download Teich J. Hardware/Software Co-Design: Past, Present, and Predicting the Future Proceedings of the IEEE 100 2012 ), S. 1411-1430 ISSN: 0018-9219 10.1109/JPROC.2011.2182009 Download Teich J. Weichslgartner A. , Oechslein B. , Schröder-Preikschat W. :Invasive Computing - Concepts and Overheads Forum on Specification & Design Languages (FDL) (Vienna 18. September 2012 - 20. September 2012 )In: Proc. of the Forum on Specification & Design Languages (FDL) , New York, NY, USA 2012 Download Wildermann S. Systematic Design of Self-Adaptive Embedded Systems with Applications in Image Processing 2012 )Download Wildermann S. Angermeier J. , Sibirko E. , Teich J. Placing Multi-mode Streaming Applications on Dynamically Partially Reconfigurable Architectures International Journal of Reconfigurable Computing 2012 2012 ), S. 1-12 ISSN: 1687-7195 10.1155/2012/608312 Download Wildermann S. Reimann F. , Ziener D. , Teich J. Symbolic System-level Design Methodology for Multi-Mode Reconfigurable Systems Design Automation For Embedded Systems 2012 ), S. 1-33 ISSN: 0929-5585 10.1007/s10617-012-9102-1 Download Wildermann S. Reimann F. , Ziener D. , Teich J. System Level Synthesis Flow for Self-adaptive Multi-mode Reconfigurable Systems Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) (Oslo 1. September 2012 - 1. September 2012 )In: Proc. of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) 2012 Download Xu Y. , Rosales R. , Wang B. , Streubühr M. , Hasholzner R. , Haubelt C. , Teich J. A very fast and quasi-accurate power-state-based system-level power modeling methodology 25th International Conference on Architecture of Computing Systems, ARCS 2012 (Munich In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS) 2012 10.1007/978-3-642-28293-5_4 Download Zebelein C. , Falk J. Haubelt C. , Teich J. A model-based inter-process resource sharing approach for high-level synthesis of dataflow graphs 2nd Electronic System Level Synthesis Conference, ESLsyn 2012 (San Francisco, CA 2. Juni 2012 - 3. Juni 2012 )https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84866155902&origin=inward Download Zebelein C. , Falk J. Haubelt C. , Teich J. Exploiting Model-Knowledge in High-Level Synthesis Workshop für Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV’12) (Kaiserslautern 5. März 2012 - 7. März 2012 )In: Workshop für Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV’12) 2012 Download Zhang L. , Glaß M. , Streubühr M. , Teich J. von Schwerin A. , Liu K. :Actor-oriented Modeling and Simulation of Cut-through Communication in Network Controllers Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) (Kaiserslautern 5. März 2012 - 7. März 2012 )In: Tagungsunterlagen Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) , Hamburg, Germany 2012 Download Zhang L. , Streubühr M. , Glaß M. , Teich J. von Schwerin A. , Liu K. :System-Level Modeling and Simulation of Networked PROFINET IO Controllers Embedded World Conference (Nuremberg 28. Februar 2012 - 1. März 2013 )In: Proc. of the Embedded World Conference , Kissingen, Germany 2012 Download Ziermann T. , Butiu A. , Teich J. Ziener D. :FPGA-based Testbed for Timing Behavior Evaluation of the Controller Area Network (CAN) 2012 International Conference on Reconfigurable Computing (ReConFig) (Cancun 5. Dezember 2012 - 7. Dezember 2012 )In: Proc. of the 2012 International Conference on Reconfigurable Computing (ReConFig) , New York, NY, USA 2012 10.1109/ReConFig.2012.6416750 Download Ziermann T. , Salcic Z. , Teich J. Improving Performance of Controller Area Network (CAN) by Adaptive Message Scheduling In: Self-Organization in Embedded Real-Time Systems Berlin; Heidelberg Springer-Verlag 2012 , S. 95-120 ISBN: 978-1-4614-1968-6 Download Ziermann T. , Wildermann S. Mühleis N. , Teich J. Distributed self-organizing bandwidth allocation for priority-based bus communication Concurrency and Computation-Practice & Experience 24 2012 ), S. 1903-1917 ISSN: 1532-0626 10.1002/cpe.1759 Download
2011 Aliee H. , Zarandi HR. :A fault-tolerant, dynamically scheduled pipeline structure for chip multiprocessors 30th International Conference on Computer Safety, Reliability and Security, SAFECOMP 2011 (Naples In: Proceedings of the 30th International Conference on Computer Safety, Reliability and Security (SAFECOMP'11) 2011 10.1007/978-3-642-24270-0_24 Download Aliee H. , Zarandi HR. :An efficient, dynamically adaptive method to tolerate transient faults in multi-core systems 13th European Workshop on Dependable Computing, EWDC 2011 (Pisa In: roceedings of the 13th European Workshop on Dependable Computing (EWDC '11) 2011 10.1145/1978582.1978594 Download Aliee H. , Zarandi HR. :Fault tree analysis using stochastic logic: A reliable and high speed computing Annual Reliability and Maintainability Symposium, RAMS 2011 (Lake Buena Vista, FL 10.1109/RAMS.2011.5754466 Download Aliee H. , Zarandi HR. , Tajary A. :CPU-aware, process-level redundancy to tolerate faults in multi-core 2011 International Conference on High Performance Computing and Simulation, HPCS 2011 (Istanbul 10.1109/HPCSim.2011.5999844 Download Angermeier J. , Sibirko E. , Wanka R. Teich J. Bitonic Sorting on Dynamically Reconfigurable Architectures IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW) (Anchorage, AL 16. Mai 2011 - 20. Mai 2011 )In: Proc. IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW) , New York, NY, USA 2011 10.1109/IPDPS.2011.164 Download Angermeier J. , Ziener D. , Glaß M. , Teich J. Runtime Stress-Aware Replica Placement on Reconfigurable Devices under Safety Constraints International Conference on Field-Programmable Technology (FPT'11) (New Delhi 12. Dezember 2011 - 14. Dezember 2011 )In: Proceedings of the International Conference on Field-Programmable Technology , New York, NY, USA 2011 10.1109/FPT.2011.6133247 Download Angermeier J. , Ziener D. , Glaß M. , Teich J. Stress-Aware Module Placement on Reconfigurable Devices International Conference on Field Programmable Logic and Applications (FPL'11) (Chania, Crete 5. September 2011 - 7. September 2011 )In: Proceedings of the International Conference on Field-Programmable Logic and Applications , New York, NY, USA 2011 10.1109/FPL.2011.56 Download Boppu S. , Hannig F. Teich J. Pérez-Andrade R. :Towards Symbolic Run-Time Reconfiguration in Tightly-Coupled Processor Arrays 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig'11) (Cancun 30. November 2011 - 2. Dezember 2011 )In: Proc. of ReConFig , New York, NY, USA 2011 10.1109/ReConFig.2011.91 http://www.computer.org/portal/web/csdl/doi/10.1109/ReConFig.2011.91 Download Cavallaro JR. , Ercegovac MD. , Hannig F. Ienne P. , Swartzlander Jr. EE. , Tenca AF. (Hrsg.):Proceedings of the 22nd IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) New York, NY, USA 2011 ISBN: 978-1-4577-1292-0 Download Dutta H. :Synthesis and Exploration of Loop Accelerators for Systems-on-a-Chip 2011 )Download Falk J. Zebelein C. , Haubelt C. , Teich J. A rule-based static dataflow clustering algorithm for efficient embedded software synthesis 14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011 (Grenoble 14. März 2011 - 18. März 2011 )In: Proceedings of Design, Automation and Test in Europe (DATE'11) 2011 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=79957549287&origin=inward Download Gladigau J. , Gerstlauer A. , Haubelt C. , Streubühr M. , Teich J. Automatic System-Level Synthesis: From Formal Application Models to Generic Bus-Based MPSoCs LNCS Transactions on High-Performance Embedded Architectures and Compilers 5 2011 ), S. 1-22 ISSN: 1864-306X Download Glaß M. :Dependability-Aware System-Level Design for Embedded Systems 2011 )Download Graf S. , Streubühr M. , Glaß M. , Teich J. Analyzing Automotive Networks using Virtual Prototypes Automotive meets Electronics (AmE), GMM Fachbericht 69 (Dortmund, Germany In: Proceedings of the Automotive meets Electronics (AmE2011), GMM Fachbericht 69 , Berlin 2011 Download Hannig F. Roloff S. , Snelting G. , Teich J. Zwinkau A. :Resource-Aware Programming and Simulation of MPSoC Architectures through Extension of X10 14th International Workshop on Software and Compilers for Embedded Systems (St. Goar 27. Juni 2011 - 28. Juni 2011 )In: Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems , New York, NY, USA 2011 10.1145/1988932.1988941 Download Helwig S. , Neumann F. , Wanka R. Velocity Adaptation in Particle Swarm Optimization In: Handbook of Swarm Intelligence Heidelberg Springer 2011 , S. 155-173 (Adaptation, Learning, and Optimization (ALO), Bd.8) 10.1007/978-3-642-17390-5_7 https://www12.cs.fau.de/people/rwanka/publications/HNW11.php Download Henkel J. , Bauer L. , Becker J. , Bringmann O. , Brinkschulte U. , Chakraborty S. , Engel M. , Ernst R. , Härtig H. , Hedrich L. , Herkersdorf A. , Kapitza R. , Lohmann D. , Marwedel P. , Platzner M. , Rosenstiel W. , Schlichtmann U. , Spinczyk O. , Tahoori M. , Teich J. Wehn N. , Wunderlich HJ. :Design and Architectures for Dependable Embedded Systems 9th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '11) (Taipei 9. Oktober 2011 - 14. Oktober 2011 )In: Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '11) , New York, NY, USA 2011 10.1145/2039370.2039384 Download Hoffmann M. , Mühlenthaler M. , Helwig S. , Wanka R. Discrete Particle Swarm Optimization for TSP: Theoretical Results and Experimental Evaluations International Conference on Adaptive and Intelligent Systems (ICAIS) (Klagenfurt In: Bouchachia A. (Hrsg.): Proc. International Conference on Adaptive and Intelligent Systems (ICAIS) , Berlin, Heidelberg 2011 10.1007/978-3-642-23857-4_40 Download Keinert J. , Teich J. Design of Image Processing Embedded Systems Using Multidimensional Data Flow Heidelberg Springer-Verlag 2011 ISBN: 978-1-4419-7181-4 http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-7181-4 Download Kern A. , Reinhard D. , Streichert T. , Teich J. Gateway Strategies for Embedding of Automotive CAN-frames into Ethernet-packets and Vice Versa 24th International Conference on Architecture of Computing Systems (ARCS'11) (Lake Como 24. Februar 2011 - 25. Februar 2011 )In: Proceedings of the 24th International Conference on Architecture of Computing Systems , Berlin; Heidelberg 2011 10.1007/978-3-642-19137-4_22 Download Kern A. , Streichert T. , Teich J. An Automated Data Structure Migration Concept - From CAN to Ethernet/IP in Automotive Embedded Systems (CANoverIP) Design, Automation and Test in Europe (DATE'11) (Grenoble 14. März 2011 - 18. März 2011 )In: Proc. of DATE , New York, NY, USA 2011 http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5763027 Download Kern A. , Zhang H. , Streichert T. , Teich J. Testing Switched Ethernet Networks in Automotive Embedded Systems 6th IEEE International Symposium on Industrial Embedded Systems (SIES'11) (Västeras 15. Juni 2011 - 17. Juni 2011 )In: Proceedings of the 6th IEEE International Symposium on Industrial Embedded Systems (SIES'11) , New York, NY, USA 2011 10.1109/SIES.2011.5953657 Download Kern A. , Zinner H. , Streichert T. , Nöbauer J. , Teich J. Accuracy of Ethernet AVB Time Synchronization Under Varying Temperature Conditions for Automotive Networks ACM/EDAC/IEEE Design Automation Conference (DAC'11) (San Diego, California 5. Juni 2011 - 9. Juni 2011 )In: Proceedings of the 2011 ACM/EDAC/IEEE Design Automation Conference (DAC'11) , New York, NY, USA 2011 10.1145/2024724.2024862 Download Khosravi F. , Farbeh H. , Fazeli M. , Miremadi SG. :Low cost concurrent error detection for on-chip memory based embedded processors 2011 IFIP 9th International Conference on Embedded and Ubiquitous Computing, EUC 2011 (Melbourne, VIC In: Proceedings of the 9th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2011) 2011 10.1109/EUC.2011.47 Download Kiesel R. , Streubühr M. , Haubelt C. , Löhlein O. , Teich J. Calibration and validation of software performance models for pedestrian detection systems 2011 11th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2011 (Samos In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI) 2011 10.1109/SAMOS.2011.6045460 Download Kissler D. :Power-Efficient Tightly-Coupled Processor Arrays for Digital Signal Processing 2011 )Download Kissler D. , Gran D. , Salcic Z. , Hannig F. Teich J. Scalable Many-Domain Power Gating in Coarse-grained Reconfigurable Processor Arrays IEEE Embedded Systems Letters 3 2011 ), S. 58-61 ISSN: 1943-0663 10.1109/LES.2011.2124438 Download Kissler D. , Hannig F. Teich J. Efficient Evaluation of Power/Area/Latency Design Trade-offs for Coarse-Grained Reconfigurable Processor Arrays Journal of Low Power Electronics 7 2011 ), S. 29-40 ISSN: 1546-1998 10.1166/jolpe.2011.1114 Download Kouveli G. , Hannig F. Lupp JH. , Teich J. Towards Resource-Aware Programming on Intel's Single-Chip Cloud Computer Processor 3rd Many-core Applications Research Community (MARC) Symposium (Ettlingen 5. Juli 2011 - 6. Juli 2011 )In: Proceedings of the 3rd MARC Symposium , Karlsruhe, Germany 2011 10.5445/KSP/1000023937 Download Kutzer P. , Gladigau J. , Haubelt C. , Teich J. Automatic generation of system-level virtual prototypes from streaming application models 2011 22nd IEEE International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, RSP-2011 (Karlsruhe In: Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping 2011 10.1109/RSP.2011.5929986 Download Kutzer P. , Streubühr M. , Haubelt C. , Teich J. von Schwerin A. :Actor-oriented Modeling of Industrial Ethernet in the Automation Domain Using SystemC Embedded World Conference (Nuermberg 1. März 2011 - 3. März 2011 )In: Proceedings of the Embedded World Conference 2011 Download Lari V. , Hannig F. Teich J. Distributed Resource Reservation in Massively Parallel Processor Arrays 25th IEEE International Symposium on Parallel and Distributed Processing (IPDPS'11) (Anchorage, AK 16. Mai 2011 - 20. Mai 2011 )In: Proc. of the 25th IEEE International Symposium on Parallel and Distributed Processing , New York, NY, USA 2011 10.1109/IPDPS.2011.157 Download Lari V. , Narovlyanskyy A. , Hannig F. Teich J. Decentralized Dynamic Resource Management Support for Massively Parallel Processor Arrays 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'11) (Santa Monica, CA 11. September 2011 - 14. September 2011 )In: Proc. of the 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors , New York, NY, USA 2011 10.1109/ASAP.2011.6043240 Download Lukasiewycz M. , Glaß M. , Reimann F. , Teich J. Opt4J - A Modular Framework for Meta-heuristic Optimization 13th Annual Genetic and Evolutionary Computation Conference (GECCO'11) (Dublin 12. Juli 2011 - 16. Juli 2011 )In: Proc. of the 13th Annual Genetic and Evolutionary Computation Conference , New York, NY, USA 2011 10.1145/2001576.2001808 Download Majer M. :The Erlangen Slot Machine - An FPGA-Based Partially Reconfigurable Computer 2011 )Download Marwedel P. , Teich J. Kouveli G. , Bacivarov I. , Thiele L. , Ha S. , Lee C. , Xu Q. , Huang L. :Mapping of Applications to MPSoCs 9th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'11) (Taipei 9. Oktober 2011 - 14. Oktober 2011 )In: Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, part of ESWeek'11 , New York, NY, USA 2011 10.1145/2039370.2039390 Download Membarth R. , Hannig F. Teich J. Körner M. , Eckert W. :Frameworks for GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration 9th IEEE Symposium on Application Specific Processors (SASP) (San Diego, CA, USA 5. Juni 2011 - 6. Juni 2011 )In: Proceedings of the 9th IEEE Symposium on Application Specific Processors (SASP) 2011 10.1109/SASP.2011.5941083 Download Membarth R. , Hannig F. Teich J. Körner M. , Eckert W. :Frameworks for Multi-core Architectures: A Comprehensive Evaluation using 2D/3D Image Registration 24th International Conference on Architecture of Computing Systems (ARCS) (Lake Como 24. Februar 2011 - 25. Februar 2011 )In: Proceedings of the 24th International Conference on Architecture of Computing Systems (ARCS) , Heidelberg 2011 10.1007/978-3-642-19137-4_6 Download Membarth R. , Hannig F. Teich J. Litz G. , Hornegger H. :Detector Defect Correction of Medical Images on Graphics Processors SPIE: Medical Imaging : Image Processing (Lake Buena Vista, Orlando, FL 14. Februar 2011 - 16. Februar 2011 )In: Proceedings of the SPIE: Medical Imaging 2011: Image Processing 2011 10.1117/12.877656 Download Membarth R. , Lokhmotov A. , Teich J. Generating GPU Code from a High-level Representation for Image Processing Kernels 5th Workshop on Highly Parallel Processing on a Chip (HPPC) (Bordeaux In: Proceedings of the 5th Workshop on Highly Parallel Processing on a Chip (HPPC) 2011 Download Mühleis N. , Glaß M. , Zhang L. , Teich J. A Co-Simulation Approach for Control Performance Analysis during Design Space Exploration of Cyber-Physical Systems 2nd International Conference on Cyber Physical Systems (ICCPS 2011) In: ACM SIGBED Review - Work-in-Progress (WiP) Session of the 2nd International Conference on Cyber Physical Systems (ICCPS 2011) 2011 10.1145/2000367.2000372 Download Omeltschuk L. , Helwig S. , Mühlenthaler M. , Wanka R. Heterogeneous Constraint Handling for Particle Swarm Optimization IEEE Swarm Intelligence Symposium (SIS) (Paris 11. April 2011 - 15. April 2011 )In: Proc. IEEE Swarm Intelligence Symposium (SIS) , New York, NY, USA 2011 10.1109/SIS.2011.5952578 Download Reimann F. , Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. Symbolic system synthesis in the presence of stringent real-time constraints 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011 (San Diego, CA 5. Juni 2011 - 10. Juni 2011 )https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=80052678758&origin=inward Download Streubühr M. , Rosales R. , Hasholzner R. , Haubelt C. , Teich J. ESL Power and Performance Estimation for Heterogeneous MPSoCs Using SystemC Forum on specification and Design Languages 2011 (Oldenbúrg 13. September 2011 - 15. September 2011 )In: Forum on specification and Design Languages 2011 2011 Download Teich J. Henkel J. , Herkersdorf A. , Schmitt-Landsiedel D. , Schröder-Preikschat W. , Snelting G. :Invasive Computing: An Overview In: M. Hübner and J. Becker (Hrsg.): Multiprocessor System-on-Chip - Hardware Design and Tool Integration New York Springer 2011 , S. 241-268 ISBN: 978-1-4419-6459-5 10.1007/978-1-4419-6460-1_11 http://invasic.informatik.uni-erlangen.de/publications/invasic-overview.pdf Download Teich J. Ziener D. :Verifying the Authorship of Embedded IP Cores: Watermarking and Core Identification Techniques (Keynote) International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'11) (Las Vegas In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms 2011 http://ersaconf.org/ersa11/program/teich.php Download Wanka R. Parallel Sorting - The Need for Speed In: Algorithms Unplugged Heidelberg Springer 2011 , S. 27-37 ISBN: 978-3-642-15327-3 10.1007/978-3-642-15328-0_4 Download Wasza J. , Bauer S. , Haase S. , Schmid M. , Reichert S. , Hornegger J. :RITK: The Range Imaging Toolkit - A Framework for 3-D Range Image Stream Processing VMV 2011: Vision, Modeling & Visualization (Berlin 4. Oktober 2011 )In: Eisert Peter, Hornegger Joachim, Polthier Konrad (Hrsg.): VMV 2011: Vision, Modeling & Visualization 2011 10.2312/PE/VMV/VMV11/057-064 http://www5.informatik.uni-erlangen.de/Forschung/Publikationen/2011/Wasza11-RTR.pdf Download Weichslgartner A. , Wildermann S. Teich J. Dynamic Decentralized Mapping of Tree-Structured Applications on NoC Architectures Fifth ACM/IEEE International Symposium on Networks-on-Chip (NOCS'11) (Pittsburgh 1. Mai 2011 - 4. Mai 2011 )In: Proc. Fifth ACM/IEEE International Symposium on Networks-on-Chip , New York, NY, USA 2011 10.1145/1999946.1999979 Download Wildermann S. Reimann F. , Teich J. Salcic Z. :Operational Mode Exploration for Reconfigurable Systems with Multiple Applications International Conference on Field-Programmable Technology (FPT'11) (New Delhi 12. Dezember 2011 - 14. Dezember 2011 )In: Proceedings of the International Conference on Field-Programmable Technology , New York, NY, USA 2011 10.1109/FPT.2011.6132693 Download Wildermann S. Reimann F. , Ziener D. , Teich J. Symbolic Design Space Exploration for Multi-Mode Reconfigurable Systems 9th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'11) (Taipei 9. Oktober 2011 - 14. Oktober 2011 )In: Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, part of ESWeek'11 , New York, NY, USA 2011 10.1145/2039370.2039393 Download Wildermann S. Ziener D. , Teich J. Unifying Partitioning and Placement for SAT-based Exploration of Heterogeneous Reconfigurable SoCs International Conference on Field Programmable Logic and Applications (FPL'11) (Chania, Crete 5. September 2011 - 7. September 2011 )In: Proc. of the International Conference on Field Programmable Logic and Applications , New York, NY, USA 2011 10.1109/FPL.2011.85 Download Ziener D. , Wildermann S. Oetken A. , Weichslgartner A. , Teich J. A Flexible Smart Camera System based on a Partially Reconfigurable Dynamic FPGA-SoC Workshop on Computer Vision on Low-Power Reconfigurable Architectures at FPL 2011 (Chania, Crete 4. September 2011 - 4. September 2011 )In: Proceedings of the Workshop on Computer Vision on Low-Power Reconfigurable Architectures at FPL 2011 2011 Download Ziermann T. , Salcic Z. , Teich J. DynOAA - Dynamic Offset Adaptation Algorithm for Improving Response Times of CAN Systems Design, Automation and Test in Europe (DATE'11) (Grenoble 14. März 2011 - 18. März 2011 )In: Proc. of DATE , New York, NY, USA 2011 http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5763272 Download Ziermann T. , Salcic Z. , Teich J. Self-organized Message Scheduling for Asynchronous Distributed Embedded Systems 8th International Conference on Autonomic and Trusted Computing (ATC'11) (Banff 2. September 2011 - 4. September 2011 )In: Proc. of the 8th International Conference on Autonomic and Trusted Computing , Heidelberg 2011 10.1007/978-3-642-23496-5_10 Download Ziermann T. , Schmidt B. , Mühlenthaler M. , Ziener D. , Angermeier J. , Teich J. An FPGA Implementation of a Threat-based Strategy for Connect6 International Conference on Field-Programmable Technology (FPT'11) (New Delhi 12. Dezember 2011 - 14. Dezember 2011 )In: Proceedings of the International Conference on Field-Programmable Technology , New York, NY, USA 2011 10.1109/FPT.2011.6133250 Download Ziermann T. , Wildermann S. Teich J. OrganicBus: Organic Self-organising Bus-Based Communication Systems In: Organic Computing - A Paradigm Shift for Complex Systems Basel Birkhäuser Verlag 2011 , S. 489-501 ISBN: 978-3-0348-0130-0 10.1007/978-3-0348-0130-0_32 Download
2010 Ahmadinia A. , Angermeier J. , Fekete SP. , Kamphans T. , Koch D. , Majer M. , Schweer N. , Teich J. Tessars C. , Van Der Veen JC. :ReCoNodes-optimization methods for module scheduling and placement on reconfigurable hardware devices Springer Netherlands 2010 ISBN: 9789048134847 10.1007/978-90-481-3485-4_10 Download Angermeier J. , Bobda C. , Majer M. , Teich J. Erlangen slot machine: An FPGA-based dynamically reconfigurable computing platform Springer Netherlands 2010 ISBN: 9789048134847 10.1007/978-90-481-3485-4_3 Download Angermeier J. , Teich J. Kamphans T. , Fekete SP. :Virtual Area Management: Multitasking on Dynamically Partially Reconfigurable Devices 17th Reconfigurable Architectures Workshop (RAW'10) (Atlanta 19. April 2010 - 23. April 2010 )In: Proc. 17th Reconfigurable Architectures Workshop 2010 10.1109/IPDPSW.2010.5470754 Download Angermeier J. , Wildermann S. Sibirko E. , Teich J. Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures International Conference on ReConFigurable Computing and FPGAs (ReConFig'10) (Cancun 13. Dezember 2010 - 15. Dezember 2010 )In: Proc. International Conference on ReConFigurable Computing and FPGAs 2010 10.1109/ReConFig.2010.52 Download Chakraborty S. , Ramesh S. , Teich J. Model-based analysis, synthesis and testing of automotive hardware/software architectures 6th Embedded Systems Week 2010, ESWEEK 2010 - 10th ACM International Conference on Compilers, Architecture and Synthesis for Embedded Systems, EMSOFT'10 (Scottsdale, AZ 10.1145/1879021.1879061 Download Charot F. , Hannig F. Teich J. Wolinski C. (Hrsg.):Proc. 21st IEEE International Conference on Application-specific Systems, Architectures, and Processors New York, NY, USA 2010 ISBN: 978-1-4244-6967-3 10.1109/ASAP.2010.5540766 Download Dutta H. , Hannig F. Schmid M. , Keinert J. :Modeling and synthesis of communication subsystems for loop accelerator pipelines 21st IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2010 (Rennes 7. Juli 2010 - 9. Juli 2010 )In: Proceedings of the 21st IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) 2010 10.1109/ASAP.2010.5540760 Download Falk J. Keinert J. , Haubelt C. , Teich J. Zebelein C. :Integrated Modeling Using Finite State Machines and Dataflow Graphs In: Bhattacharyya S., Deprettere E., Leupers R., Takala J. (Hrsg.): Handbook of Signal Processing Systems Boston, MA Springer 2010 , S. 1041-1075 ISBN: 978-1-4419-6344-4 10.1007/978-1-4419-6345-1_36 Download Falk J. Zebelein C. , Haubelt C. , Teich J. Dorsch R. :Integrating Hardware/Firmware Verification Efforts Using SystemC High-Level Models 3. ITG/GI/GMM Workshop für Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Dresden 22. Februar 2010 - 24. Februar 2010 )In: 3. ITG/GI/GMM Workshop für Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2010 Download Falk J. Zebelein C. , Keinert J. , Haubelt C. , Teich J. Bhattacharyya SS. :Analysis of systemc actor networks for efficient synthesis ACM Transactions on Embedded Computing Systems 10 2010 ), Art.Nr.: 18 ISSN: 1539-9087 10.1145/1880050.1880054 Download Gladigau J. , Gerstlauer A. , Haubelt C. , Streubühr M. , Teich J. A system-level synthesis approach from formal application models to generic bus-based MPSoCs 2010 10th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2010 (Samos 19. Juli 2010 - 22. Juli 2010 )In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2010 10.1109/ICSAMOS.2010.5642076 Download Glaß M. , Herrscher D. , Piastowski M. , Meier H. , Schoo P. :SEIS - Sicherheit in Eingebetteten IP-Basierten Systemen ATZ - Automobiltechnische Zeitschrift 2010 ), S. 50-55 ISSN: 0001-2785 Download Glaß M. , Lukasiewycz M. , Haubelt C. , Teich J. Lifetime Reliability Optimization for Embedded Systems: A System-Level Approach IEEE International Workshop on Reliability Aware System Design and Test (RASDAT '10) (Bangalore 7. Januar 2010 - 8. Januar 2010 )In: Proceedings of IEEE International Workshop on Reliability Aware System Design and Test (RASDAT '10) 2010 Download Glaß M. , Lukasiewycz M. , Haubelt C. , Teich J. Towards scalable system-level reliability analysis 47th Design Automation Conference, DAC '10 (Anaheim, CA 13. Juni 2010 - 18. Juni 2010 )10.1145/1837274.1837334 Download Glaß M. , Lukasiewycz M. , Reimann F. , Haubelt C. , Teich J. Symbolic system level reliability analysis 2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010 (San Jose, CA 7. November 2010 - 11. November 2010 )In: Proceedings of the International Conference on Computer-Aided Design (ICCAD) 2010 10.1109/ICCAD.2010.5654134 Download Hannig F. Schmid M. , Teich J. Hornegger H. :A Deeply Pipelined and Parallel Architecture for Denoising Medical Images IEEE International Conference on Field Programmable Technology (FPT'10) (Beijing 8. Dezember 2010 - 10. Dezember 2010 )In: Proc. IEEE International Conference on Field Programmable Technology 2010 10.1109/FPT.2010.5681464 Download Haubelt C. , Koch D. , Reimann F. , Streichert T. , Teich J. ReCoNets-design methodology for embedded systems consisting of small networks of reconfigurable nodes and connections Springer Netherlands 2010 ISBN: 9789048134847 10.1007/978-90-481-3485-4_11 Download Haubelt C. , Teich J. Digitale Hardware/Software-Systeme: Spezifikation und Verifikation Berlin, Heidelberg Springer-Verlag 2010 Download Helwig S. :Particle Swarms for Constrained Optimization 2010 )https://nbn-resolving.org/urn:nbn:de:bvb:29-opus-19334 Download Hofer W. , Elsner C. , Blendinger F. , Schröder-Preikschat W. , Lohmann D. :Leviathan: SPL Support on Filesystem Level 14th International Software Product Line Conference (SPLC-Poster 2010) (Jeju Island, South Korea 13. September 2010 - 17. September 2010 )In: Proceedings of the 14th International Software Product Line Conference (SPLC-Poster 2010) , Berlin/Heidelberg, Germany 2010 10.1007/978-3-642-15579-6_43 http://www4.informatik.uni-erlangen.de/Publications/2010/hofer_10_splc_poster.pdf Download Hofer W. , Elsner C. , Blendinger F. , Schröder-Preikschat W. , Lohmann D. :Toolchain-Independent Variant Management with the Leviathan Filesystem 2nd Workshop on Feature-Oriented Software Development (FOSD 2010) (Eindhoven, The Netherlands 10. Oktober 2010 - 10. Oktober 2010 )In: Proceedings of the 2nd Workshop on Feature-Oriented Software Development (FOSD 2010) , New York, NY, USA 2010 10.1145/1868688.1868692 http://www4.informatik.uni-erlangen.de/Publications/2010/hofer_10_fosd.pdf Download Kern A. , Schmutzler C. , Streichert T. , Hübner M. , Teich J. Network bandwidth optimization of ethernet-based streaming applications in automotive embedded systems 2010 19th International Conference on Computer Communications and Networks, ICCCN 2010 (Zurich 2. August 2010 - 5. August 2010 )In: Proceedings of the Internaional Conference on Computer Communication Networks (ICCCN) 2010 – Track on Network Algorithms, Performance Evaluation and Theory (NAPET) 2010 10.1109/ICCCN.2010.5560142 Download Kiesel R. , Löhlein O. , Terzis A. , Streubühr M. , Haubelt C. , Teich J. Actor-oriented Modeling of Driver Assistance Systems for Efficient Multi-Core ECU Implementation Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Dresden In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2010 Download Lukasiewycz M. :Modeling, Analysis and Optimization of Automotive Networks 2010 )Download Lukasiewycz M. , Glaß M. , Teich J. Robust Design of Embedded Systems Design, Automation and Test in Europe (DATE'10) (Dresden 8. März 2010 - 12. März 2010 )In: Proc. Design, Automation and Test in Europe 2010 Download May M. , Wehn N. , Bouajila A. , Zeppenfeld J. , Stechele W. , Herkersdorf A. , Ziener D. , Teich J. A Rapid Prototyping System for Error-Resilient Multi-Processor Systems-on-Chip Design, Automation and Test in Europe (DATE'10) (Dresden 8. März 2010 - 12. März 2010 )In: Proc. Design, Automation and Test in Europe 2010 Download Membarth R. , Hannig F. Teich J. Körner M. , Eckert W. :Comparison of Parallelization Frameworks for Shared Memory Multi-Core Architectures Embedded World Conference (Nuremberg 3. März 2010 - 5. März 2010 )In: Proc. Embedded World Conference 2010 Download Mühlenthaler M. , Wanka R. A Novel Event Insertion Heuristic for Finding Feasible Solutions of Course Timetabling Problems Int. Conf. on the Practice and Theory of Automated Timetabling (PATAT) (Belfast In: Proc. 8th Int. Conf. on the Practice and Theory of Automated Timetabling (PATAT) 2010 Download Mühlenthaler M. , Wanka R. Improving Bitonic Sorting by Wire Elimination PARS-Workshop on Parallel Systems and Architectures of the 23rd Int. Conf. on Architecture of Computing Systems (ARCS) (Hannover In: Proc. 23rd PARS-Workshop on Parallel Systems and Architectures of the 23rd Int. Conf. on Architecture of Computing Systems (ARCS) , Berlin, Offenbach 2010 http://www12.informatik.uni-erlangen.de/people/rwanka/publications/MW10.php Download Oetken A. , Wildermann S. Teich J. Koch D. :A bus-based SoC architecture for flexible module placement on reconfigurable FPGAs 20th International Conference on Field Programmable Logic and Applications, FPL 2010 (Milano In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL'10) 2010 10.1109/FPL.2010.54 Download Patino-Studencki L. , Batzer U. , Gutiérrez Boronat J. , Jahn J. , Seitz J. :Comparison and evaluation of acceleration based step length estimators for handheld devices International Conference on Indoor Positioning and Indoor Navigation (IPIN), (Zurich 15. September 2010 - 17. September 2010 )In: 2010 International Conference on Indoor Positioning and Indoor Navigation 2010 10.1109/IPIN.2010.5646888 Download Patino-Studencki L. , Thielecke J. , Batzer U. :Phase smoothing in a virtually synchronized pseudolite system using stochastic clock modelling Ubiquitous Positioning Indoor Navigation and Location Based Service (UPINLBS) (Kirkkonummi, Finnland 14. Oktober 2010 - 15. Oktober 2010 )In: Ubiquitous Positioning Indoor Navigation and Location Based Service (UPINLBS) 2010 10.1109/UPINLBS.2010.5654340 Download Platzner M. , Teich J. Wehn N. :Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications Heidelberg Springer 2010 ISBN: 978-90-481-3484-7 10.1007/978-90-481-3485-4 Download Reimann F. , Kern A. , Haubelt C. , Streichert T. , Teich J. Echtzeitanalyse Ethernet-basierter E/E-Architekturen im Automobil Automotive meets Electronics (AmE'10) (Dortmund, Germany In: GMM-Fachbericht - Automotive meets Electronics , Berlin 2010 Download Ritscher T. , Helwig S. , Wanka R. Design and Experimental Evaluation of Multiple Adaptation Layers in Self-optimizing Particle Swarm Optimization IEEE Congress on Evolutionary Computation (Barcelona 18. Juli 2010 - 23. Juli 2010 )In: Proceedings of the IEEE Congress on Evolutionary Computation (CEC 2010) 2010 10.1109/CEC.2010.5586255 http://www12.informatik.uni-erlangen.de/people/rwanka/publications/RHW10.php Download Schmid M. , Hannig F. Teich J. Diefenbach R. , Pettendorf R. , Hornegger H. :Discourse on Extending Embedded Medical Image Processing Systems Using the High Speed Serial RapidIO Interconnect Embedded World Conference (Nuremberg 3. März 2010 - 5. März 2010 )In: Proceedings of the Embedded World Conference 2010 Download Schönfeld F. , Meyer Q. , Stamminger M. , Wanka R. 3-SAT on CUDA: Towards a Massively Parallel SAT Solver High Performance Computing and Simulation Conference (HPSC) (Caen 28. Juni 2010 - 2. Juli 2010 )In: Proc. High Performance Computing and Simulation Conference (HPSC) 2010 10.1109/HPCS.2010.5547116 Download Sim JE. , Wong WF. , Walla G. , Ziermann T. , Teich J. Interprocedural Placement-Aware Configuration Prefetching for FPGA-based Systems 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'10) (Charlotte, North Carolina 2. Mai 2010 - 4. Mai 2010 )In: Proc. 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines 2010 10.1109/FCCM.2010.35 Download Streubühr M. , Gladigau J. , Haubelt C. , Teich J. Efficient approximately-timed performance modeling for architectural exploration of MPSoCs 2010 ISBN: 9789048193035 10.1007/978-90-481-9304-2_4 Download Teich J. Haubelt C. , Eberl M. , Reimann F. , Glaß M. :Improving platform-based system synthesis by satisfiability Modulo theories solving 6th Embedded Systems Week, ESWEEK 2010 - 8th IEEE/ACM International Conference on Hardware/Software-Co-Design and System Synthesis, CODES+ISSS'10 (Scottsdale, AZ 24. Oktober 2010 - 29. Oktober 2010 )In: Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2010 10.1145/1878961.1878986 Download Vander Aa T. , Raghavan P. , Mahlke S. , De Sutter B. , Shrivastava A. , Hannig F. Compilation Techniques for CGRAs: Exploring All Parallelization Approaches International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS'10) (Scottsdale, AZ 24. Oktober 2010 - 29. Oktober 2010 )In: Proc. 8th International Conference on Hardware-Software Codesign and System Synthesis 2010 10.1145/1878961.1878995 Download Wanka R. Mühlenthaler M. :A novel event insertion heuristic for creating feasible course timetables 8th International Conference on the Practice and Theory of Automated Timetabling (PATAT) (Belfast In: Proc. 8th International Conference on the Practice and Theory of Automated Timetabling (PATAT) 2010 https://www12.informatik.uni-erlangen.de/people/rwanka/publications/MW10b.php Download Wildermann S. Oetken A. , Teich J. Salcic Z. :Self-organizing computer vision for robust object tracking in smart cameras 7th International Conference on Autonomic and Trusted Computing, ATC 2010 (Xi'an 26. Oktober 2010 - 29. Oktober 2010 )In: Proceedings of the 7th International Conference on Autonomic and Trusted Computing 2010 10.1007/978-3-642-16576-4_1 Download Zebelein C. , Falk J. Haubelt C. , Teich J. Dorsch R. :Efficient high-level modeling in the networking domain Design, Automation and Test in Europe Conference and Exhibition, DATE 2010 (Dresden 8. März 2010 - 12. März 2010 )In: Proceedings of Design, Automation and Test in Europe (DATE 2010) 2010 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=77953092909&origin=inward Download Ziener D. :Techniques for Increasing Security and Reliability of IP Cores Embedded in FPGA and ASIC Designs 2010 )https://opus4.kobv.de/opus4-fau/files/9273/dissertation.pdf Download Ziener D. , Baueregger F. , Teich J. Multiplexing Methods for Power Watermarking IEEE Int. Symposium on Hardware-Oriented Security and Trust (HOST'10) (Anaheim 13. Juni 2010 - 14. Juni 2010 )In: Proc. IEEE Int. Symposium on Hardware-Oriented Security and Trust 2010 10.1109/HST.2010.5513118 Download Ziener D. , Baueregger F. , Teich J. Using the Power Side Channel of FPGAs for Communication 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'10) (Charlotte, North Carolina 2. Mai 2010 - 4. Mai 2010 )In: Proc. 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines 2010 10.1109/FCCM.2010.43 Download Ziener D. , Schmid M. , Teich J. Robustness Analysis of Watermark Verification Techniques for FPGA Netlist Cores In: Design Methodologies for Secure Embedded Systems Berlin Springer Verlag 2010 , S. 105-127 (Lecture Notes in Electrical Engineering, Bd.78)ISBN: 978-3-642-16766-9 10.1007/978-3-642-16767-6_6 Download Ziener D. , Teich J. New Directions for FPGA IP Core Watermarking and Identification Dagstuhl Seminar 10281 In: Dagstuhl Seminar 10281 Proceedings 2010 Download Ziermann T. , Mühleis N. , Wildermann S. Teich J. A self-organizing distributed reinforcement learning algorithm to achieve fair bandwidth allocation for priority-based bus communication 2010 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, ISORC Workshops 2010 (Carmona, Sevilla 11. Mai 2010 - 11. Mai 2010 )In: Proceedings of the 1st IEEE Workshop on Self-Organizing Real-Time systems (SORT 2010) 2010 10.1109/ISORCW.2010.18 Download Ziermann T. , Teich J. Adaptive Traffic Scheduling Techniques for Mixed Real-Time and Streaming Applications on Reconfigurable Hardware 17th Reconfigurable Architectures Workshop (RAW'10) (Atlanta 19. April 2010 - 23. April 2010 )In: Proc. 17th Reconfigurable Architectures Workshop 2010 10.1109/IPDPSW.2010.5470738 Download Ziermann T. , Teich J. Electromagnetic Compatibility (EMC) of CAN+ Automotive meets Electronics (AmE'10) (Dortmund 15. April 2010 - 16. April 2010 )In: GMM-Fachbericht - Automotive meets Electronics , Berlin 2010 Download
2009 Arifin F. , Amouri A. , Hannig F. Teich J. FPGA Implementation of an Invasive Computing Architecture IEEE International Conference on Field Programmable Technology (FPT) (Sydney 9. Dezember 2009 - 11. Dezember 2009 )In: Proceedings of the IEEE International Conference on Field Programmable Technology 2009 10.1109/FPT.2009.5377633 Download Arifin F. , Membarth R. , Amouri A. , Hannig F. Teich J. FSM-Controlled Architectures for Linear Invasion 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (Florianópolis In: Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integration 2009 Download Dutt N. , Teich J. CODES+ISSS 2007 guest editors' introduction Design Automation For Embedded Systems 13 2009 ), S. 51-52 ISSN: 0929-5585 10.1007/s10617-008-9036-9 Download Dutta H. , Hannig F. Teich J. Performance Matching of Hardware Acceleration Engines for Heterogeneous MPSoC using Modular Performance Analysis 22nd International Conference on Architecture of Computing Systems (ARCS) (Delft 10. März 2009 - 13. März 2009 )In: Proceedings of the 22nd International Conference on Architecture of Computing Systems 2009 10.1007/978-3-642-00454-4_23 Download Dutta H. , Kissler D. , Hannig F. Kupriyanov O. , Teich J. Pottier B. :A Holistic Approach for Tightly Coupled Reconfigurable Parallel Processors Microprocessors and Microsystems 33 2009 ), S. 53-62 ISSN: 0141-9331 10.1016/j.micpro.2008.08.007 Download Dutta H. , Zhai J. , Hannig F. Teich J. Impact of loop tiling on the controller logic of acceleration engines 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009 (Boston, MA 7. Juli 2009 - 9. Juli 2009 )In: Proceedings of 20th IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) 2009 10.1109/ASAP.2009.21 Download Dutta H. , Zhai J. , Hannig F. Teich J. Impact of Loop Tiling on the Controller Logic of Hardware Acceleration Engines 20th IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) (Boston, MA 7. Juli 2009 - 9. Juli 2009 )In: Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures, and Processors 2009 Download Gerstlauer A. , Haubelt C. , Pimentel A. , Stefanov T. , Gajski D. , Teich J. Electronic System-Level Synthesis Methodologies IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28 2009 ), S. 1517-1530 ISSN: 0278-0070 10.1109/TCAD.2009.2026356 Download Gladigau J. , Haubelt C. , Streubühr M. , Teich J. Schneider A. , Knäblein J. , Lindig M. :Testfallgenerierung für SystemC-Designs mit abstrakten Modellbeschreibungen Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Berlin 2. März 2009 - 4. März 2009 )In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2009 Download Gladigau J. , Haubelt C. , Teich J. Symbolic scheduling of SystemC dataflow designs In: M. Radetzki (Hrsg.): Languages for Embedded Systems and their Applications Springer 2009 , S. 183-199 (Lecture Notes in Electrical Engineering, Bd.36)ISBN: 9781402097133 10.1007/978-1-4020-9714-0_12 Download Glaß M. , Haubelt C. , Lukasiewycz M. , Teich J. Incorporating graceful degradation into embedded system design 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 (Nice 20. April 2009 - 24. April 2009 )In: Proceedings of Design, Automation and Test in Europe (DATE 2009) 2009 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=70350062092&origin=inward Download Glaß M. , Lukasiewycz M. , Teich J. Bordoloi U. , Chakraborty S. :Designing Heterogeneous ECU Networks via Compact Architecture Encoding and Hybrid Timing Analysis ACM/EDAC/IEEE Design Automation Conference (DAC'09) (San Francisco 26. Juli 2009 - 31. Juli 2009 )In: Proc. 2009 ACM/EDAC/IEEE Design Automation Conference 2009 Download Gnezdilov A. , Wittmann S. , Helwig S. , Kókai G. :Acceleration of a Relative Positioning Framework International Journal of Computational Intelligence Research 5 2009 ), S. 130-140 ISSN: 0973-1873 10.5019/j.ijcir.2009.176 Download Hannig F. Scheduling Techniques for High-Throughput Loop Accelerators 2009 )Download Hannig F. Dutta H. , Teich J. Parallelization Approaches for Hardware Accelerators - Loop Unrolling versus Loop Partitioning 22nd International Conference on Architecture of Computing Systems (ARCS) (Delft 10. März 2009 - 13. März 2009 )In: Proceedings of the 22nd International Conference on Architecture of Computing Systems 2009 10.1007/978-3-642-00454-4_5 Download Helwig S. , Neumann F. , Wanka R. Particle Swarm Optimization with Velocity Adaptation International Conference on Adaptive and Intelligent Systems (ICAIS'09) (Klagenfurt, Austria 24. September 2009 - 26. September 2009 )In: Proc. 2009 International Conference on Adaptive and Intelligent Systems 2009 10.1109/ICAIS.2009.32 http://www12.informatik.uni-erlangen.de/people/helwig/publications/HNW09.php Download Keinert J. :Data Flow Based System Level Modeling, Analysis, and Synthesis of High-Performance Streaming Image Processing Applications 2009 )Download Keinert J. , Dutta H. , Hannig F. Haubelt C. , Teich J. Model-based synthesis and optimization of static multi-rate image processing algorithms 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 (Nice 20. April 2009 - 24. April 2009 )In: Proceedings of Design, Automation and Test in Europe (DATE 2009) 2009 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=70350072695&origin=inward Download Keinert J. , Haubelt C. , Teich J. Data Flow Based System Level Design and Analysis of Concurrent Image Processing Applications DATE'09 Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (Nice In: Proceedings of DATE'09 Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications 2009 Download Keinert J. , Streubühr M. , Schlichter T. , Falk J. Gladigau J. , Teich J. Haubelt C. , Meredith M. :SYSTEMCODESIGNER - An Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications ACM Transactions on Design Automation of Electronic Systems 14 2009 ), S. 1-23 ISSN: 1084-4309 10.1145/1455229.1455230 Download Kissler D. , Strawetz A. , Hannig F. Teich J. Power-efficient Reconfiguration Control in Coarse-grained Dynamically Reconfigurable Architectures Journal of Low Power Electronics 5 2009 ), S. 96-105 ISSN: 1546-1998 10.1166/jolpe.2009.1008 Download Koch D. :Architectures, Methods, and Tools for Distributed Run-Time Reconfigurable FPGA-based Systems 2009 )Download Koch D. , Beckhoff C. , Teich J. A Communication Architecture for Complex Runtime Reconfigurable Systems and its Implementation on Spartan-3 FPGAs 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA'09) (Monterey, California In: Proc. 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays 2009 Download Koch D. , Beckhoff C. , Teich J. Minimizing Internal Fragmentation by Fine-grained Two-dimensional Module Placement for Runtime Reconfigurable Systems 17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'09) (Napa, CA 5. April 2009 - 7. April 2009 )In: Proc. 17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines 2009 10.1109/FCCM.2009.40 Download Kupriyanov O. :Modeling and Efficient Simulation of Complex System-on-a-Chip Architectures 2009 )Download Lari V. , Hannig F. Teich J. System Integration of Tightly-Coupled Reconfigurable Processor Arrays and Evaluation of Buffer Size Effects on Their Performance 4th International Symposium on Embedded Multicore Systems-on-Chip (MCSoC) (Vienna 22. September 2009 - 25. September 2009 )In: Proceedings of the 4th International Symposium on Embedded Multicore Systems-on-Chip 2009 10.1109/ICPPW.2009.72 Download Lukasiewycz M. , Glaß M. , Milbredt P. , Teich J. FlexRay Schedule Optimization of the Static Segment 7th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Grenoble 11. Oktober 2009 - 16. Oktober 2009 )In: Proc. 7th International Conference on Hardware/Software Codesign and System Synthesis 2009 10.1145/1629435.1629485 Download Lukasiewycz M. , Glaß M. , Teich J. Exploiting Data-Redundancy in Reliability-Aware Networked Embedded System Design 7th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Grenoble 11. Oktober 2009 - 16. Oktober 2009 )In: Proc. 7th International Conference on Hardware/Software Codesign and System Synthesis 2009 10.1145/1629435.1629468 Download Lukasiewycz M. , Streubühr M. , Glaß M. , Haubelt C. , Teich J. Combined system synthesis and communication architecture exploration for MPSoCs 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 (Nice 20. April 2009 - 24. April 2009 )In: Proceedings of Design, Automation and Test in Europe (DATE 2009) 2009 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=70350043908&origin=inward Download Membarth R. , Hannig F. Dutta H. , Teich J. Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors 9th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS Workshop) (Island of Samos 20. Juli 2009 - 23. Juli 2009 )In: Proceedings of the 9th International Workshop on Systems, Architectures,Modeling, and Simulation (SAMOS) , Berlin / Heidelberg 2009 10.1007/978-3-642-03138-0_31 Download Membarth R. , Hannig F. Dutta H. , Teich J. Optimization Flow for Algorithm Mapping on Graphics Cards Advanced Computer Architecture and Compilation for Embedded Systems (ACACES) (Barcelona 12. Juli 2009 - 18. Juli 2009 )In: Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems 2009 Download Membarth R. , Kutzer P. , Dutta H. , Hannig F. Teich J. Acceleration of multiresolution imaging algorithms: A comparative study 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009 (Boston, MA 7. Juli 2009 - 9. Juli 2009 )In: Proceedings of the 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2009 10.1109/ASAP.2009.8 Download Sarkar N. , Membarth R. :Modeling and Simulation of IEEE 802.11g using OMNeT++ In: Handbook of Research on Discrete Event Simulation Environments: Technologies and Applications Hershey, PA Information Science Reference 2009 , S. 379-397 ISBN: 978-1-60566-774-4 10.4018/978-1-60566-774-4.ch017 Download Schöber V. , Bringmann O. , Herkersdorf A. , Stechele W. , Wehn N. , May M. , Ziener D. , Bouajila A. , Baldin D. , Zeppenfeld J. , Sanders B. , Teich J. Sebastian M. , Ernst R. , Treytnar D. :AIS-Autonomous Integrated Systems newsletter edacentrum 4 2009 ), S. 5-13 ISSN: 1862-2283 Download Sim JE. , Wong WF. , Teich J. Optimal Placement-aware Trace-based Scheduling of Hardware Reconfigurations for FPGA Accelerators 17th IEEE Symposium on Field Programmable Custom Computing Machines (FCCM'09) (Napa, CA 5. April 2009 - 7. April 2009 )In: Proc. 17th IEEE Symposium on Field Programmable Custom Computing Machines 2009 10.1109/FCCM.2009.49 Download Streubühr M. :Model-based Virtual Prototyping for Automotive Applications 3rd Chinese-German Summer School (Erlangen In: Proceedings of the 3rd Chinese-German Summer School 2009 Download Streubühr M. , Gladigau J. , Haubelt C. , Teich J. Efficient approximately-timed performance modeling for architectural exploration of MPSoCs 2009 Forum on Specification and Design Languages, FDL 2009 (Sophia Antipolis 22. September 2009 - 24. September 2009 )In: Forum on specification and Design Languages 2009 2009 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=77951563792&origin=inward Download Streubühr M. , Haubelt C. , Teich J. System Level Performance Simulation for Heterogeneous Multi-Processor Architectures 1st HiPEAC Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), in conjunction with the 4th HiPEAC Conference (Paphos 25. Januar 2009 - 25. Januar 2009 )In: 1st HiPEAC Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), in conjunction with the 4th HiPEAC Conference 2009 Download Streubühr M. , Jäntsch M. , Haubelt C. , Teich J. From Model-based Design to Virtual Prototypes for Automotive Applications Embedded World Conference (Nuremberg 3. März 2009 - 5. März 2009 )In: Proceedings of the Embedded World Conference 2009 Download Teich J. Angermeier J. , Amouri A. :General methodology for mapping iterative approximation algorithms to adaptive dynamically partially reconfigurable systems FPL 09: 19th International Conference on Field Programmable Logic and Applications (Prague 31. August 2009 - 31. August 2009 )In: Proc. 19th International Conference on Field-Programmable Logic and Applications 2009 10.1109/FPL.2009.5272281 Download Teich J. Beckhoff C. , Koch D. :A communication architecture for complex runtime systems and its implementation on spartan-3 FPGAs 7th ACM SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA'09 (Monterey, CA In: Proceedings of the 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2009) 2009 10.1145/1508128.1508170 Download Teich J. Beckhoff C. , Koch D. :Hardware decompression techniques for FPGA-based embedded systems ACM Transactions on Reconfigurable Technology and Systems 2 2009 ), Art.Nr.: 9 ISSN: 1936-7406 10.1145/1534916.1534919 Download Wildermann S. Walla G. , Ziermann T. , Teich J. Self-Organizing Multi-cue Fusion for FPGA-based Embedded Imaging 19th International Conference on Field-Programmable Logic and Applications (FPL'09) (Prague 31. August 2009 - 2. September 2009 )In: Proc. 19th International Conference on Field-Programmable Logic and Applications 2009 10.1109/FPL.2009.5272523 Download Wildermann S. Ziermann T. , Teich J. Run time Mapping of AdaptiveApplications onto Homogeneous NoC-based Reconfigurable Architectures The International Conference on Field-Programmable Technology (FPT'09) (Sydney In: Proc. 2009 International Conference on Field-Programmable Technology 2009 Download Wildermann S. Ziermann T. , Teich J. Self-Organizing Bandwidth Sharing in Priority-based Medium Access Third IEEE International Conference on Self-Adaptive and Self-Organizing Systems (SASO'09) (San Francisco 14. September 2009 - 18. September 2009 )In: Proc. 3rd IEEE International Conference on Self-Adaptive and Self-Organizing Systems 2009 10.1109/SASO.2009.18 Download Ziener D. , Teich J. Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs International Journal of Autonomous and Adaptive Communications Systems 2 2009 ), S. 256-275 ISSN: 1754-8632 10.1504/IJAACS.2009.026785 Download Ziermann T. , Teich J. Wildermann S. CAN+: Techniques and Prototype for Achieving Increased Data Rates on the Basis of Common CAN Bus Structures The 9th Stuttgart, International Symposium (Stuttgart In: Proc. 9th Stuttgart, International Symposium 2009 Download Ziermann T. , Wildermann S. Teich J. CAN+: A New Backward-compatible Controller Area Network (CAN) Protocol with up to 16x Higher Data Rates Design, Automation and Test in Europe (DATE'09) (Nice 20. April 2009 - 24. April 2009 )In: Proc. Design, Automation and Test in Europe 2009 Download
2008 Ahmadinia Ali, Fekete Sándor, Göhringer Diana, Majer Mateusz, Teich Jürgen, van der Veen Jan:Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device IEEE Transactions on Very Large Scale Integration (Vlsi) Systems 16 2008 ), S. 1210-1219 ISSN: 1063-8210 Download Angermeier J. , Batzer U. , Claus C. , Majer M. , Stechele W. , Teich J. Reconfigurable HW/SW Architecture of a Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System Fourth International Workshop on Applied Reconfigurable Computing (ARC) (London In: Proceedings of the Fourth International Workshop on Applied Reconfigurable Computing , Berlin Heidelberg 2008 Download Angermeier J. , Claus C. , Stechele W. , Teich J. A comparison of embedded reconfigurable video-processing architectures International Conference on Field-Programmable Logic and Applications (FPL 08) (Heidelberg 8. September 2008 - 10. September 2008 )In: Proceedings of International Conference on Field-Programmable Logic and Applications , New York 2008 10.1109/FPL.2008.4630015 http://www.kip.uni-heidelberg.de/fpl08/titel/index.php Download Angermeier J. , Hanke S. , Majer M. , Teich J. Wildermann S. Co-Design Architecture and Implementation for Point-Based Rendering on FPGAs Proc. 19th IEEE/IFIP International Symposium on Rapid System Prototyping (RSP ) (Monterey 2. Juni 2008 - 5. Juni 2008 )In: Proc. 19th IEEE/IFIP International Symposium on Rapid System Prototyping 2008 10.1109/RSP.2008.23 Download Angermeier J. , Teich J. Heuristics for Scheduling Reconfigurable Devices with Consideration of Reconfiguration Overheads 15th Reconfigurable Architectures Workshop (RAW 2008) (Miami, Florida 14. April 2008 - 18. April 2008 )In: Proceedings 15th Reconfigurable Architectures Workshop , New York 2008 10.1109/IPDPS.2008.4536540 Download Beckhoff C. , Koch D. , Teich J. ReCoBus-Builder - A Novel Tool and Technique to Build Statically and Dynamically Reconfigurable Systems for FPGAs International Conference on Field-Programmable Logic and Applications (FPL 08) (Heidelberg 8. September 2008 - 10. September 2008 )In: Proceedings of International Conference on Field-Programmable Logic and Applications , New York 2008 10.1109/FPL.2008.4629918 Download Brendle R. , Streichert T. , Koch D. , Haubelt C. , Teich J. Dynamic reconfiguration of FlexRay schedules for response time reduction in asynchronous fault-tolerant networks 21st International Conference on Architecture of Computing Systems, ARCS 2008 (Dresden 25. Februar 2008 - 28. Februar 2008 )In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS 2008) 2008 10.1007/978-3-540-78153-0_10 Download Dehbashi M. , Lari V. , Miremadi SG. , Shokrollah-Shirazi M. :Fault effects in FlexRay-based networks with hybrid topology 3rd International Conference on Availability, Security, and Reliability, ARES 2008 (Barcelona In: Proceedings of the 3th International Conference on Availability, Reliability and Security (ARES'08) 2008 10.1109/ARES.2008.161 Download Dorsch R. , Haubelt C. , Teich J. Entdecke die Möglichkeiten Design & Elektronik 2008 ), S. 22-27 ISSN: 0933-8667 Download Dutta Hritam, Hannig Frank, Hartl Matthias, Kissler Dmitrij, Teich Jürgen:Domain-Specific Reconfigurable MPSoC-Systems - Challenges and Trends Friday Workshop Reconfigurable Hardware, Design, Automation and Test in Europe (Munich, Germany In: Friday Workshop Reconfigurable Hardware, Design, Automation and Test in Europe , New York 2008 Download Dutta H. , Hannig F. Ruckdeschel H. , Teich J. Quantitative Evaluation of Behavioral Synthesis Approaches for Reconfigurable Devices 2nd HiPEAC Workshop on Reconfigurable Computing (Gothenburg In: Proceedings of the 2nd HiPEAC Workshop on Reconfigurable Computing 2008 Download Falk J. Keinert J. , Haubelt C. , Teich J. Bhattacharyya SS. :A Generalized Static Data Flow Clustering Algorithm for MPSoC Scheduling of Multimedia Applications 8th ACM & IEEE international conference on Embedded software (EMSOFT'2008) (Atlanta, Georgia 20. Oktober 2008 - 22. Oktober 2008 )In: Proc. of the 8th ACM & IEEE international conference on Embedded software (EMSOFT'2008) 2008 Download Fekete SP. , Kamphans T. , Schweer N. , Tessars C. , Van Der Veen JC. , Angermeier J. , Koch D. , Teich J. No-Break Dynamic Defragmentation of Reconfigurable Devices International Conference on Field-Programmable Logic and Applications (FPL 08) (Heidelberg 8. September 2008 - 10. September 2008 )In: Proceedings of International Conference on Field-Programmable Logic and Applications , New York 2008 10.1109/FPL.2008.4629917 Download Gladigau J. , Blendinger F. , Haubelt C. , Teich J. Symbolische Modellprüfung Aktor-orientierter High-level SystemC-Modelle mit Intervalldiagrammen 11. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Freiburg 3. März 2008 - 5. März 2008 )Download Gladigau J. , Haubelt C. , Niemann B. , Teich J. Mapping Actor-Oriented Models to TLM Architectures Forum on specification and Design Languages 2007 (Barcelona 18. September 2007 - 20. September 2007 )In: Proceedings FDL'07, Forum on specification and Design Languages 2007 2008 Download Gladigau J. , Haubelt C. , Teich J. Symbolic quasi-static scheduling of actor-oriented SystemC models 2008 Forum on Specification, Verification and Design Languages, FDL'08 (Stuttgart In: Proceedings of Forum on specification & Design Languages 2008 (FDL08) 2008 10.1109/FDL.2008.4641412 Download Glaß M. , Lukasiewycz M. , Reimann F. , Haubelt C. , Teich J. Symbolic reliability analysis and optimization of ECU networks Design, Automation and Test in Europe, DATE 2008 (Munich 10. April 2008 - 14. April 2008 )In: Proceedings of Design, Automation and Test in Europe (DATE 2008) 2008 10.1109/DATE.2008.4484679 Download Glaß M. , Lukasiewycz M. , Reimann F. , Haubelt C. , Teich J. Symbolic reliability analysis of self-healing networked embedded systems 27th International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2008 (Newcastle upon Tyne 22. September 2008 - 25. September 2008 )In: Proceedings of the 27th International Conference on Computer Safety, Reliability and Security (SAFECOMP 2008) 2008 10.1007/978-3-540-87698-4_14 Download Glaß M. , Lukasiewycz M. , Teich J. A Feasibility-Preserving Crossover and Mutation Operator for Constrained Combinatorial Problems 10th International Conference on Parallel Problem Solving from Nature (PPSN08) (Dortmund 13. September 2008 - 17. September 2008 )In: Proceedings of the 10th International Conference on Parallel Problem Solving from Nature , Berlin, Heidelberg 2008 10.1007/978-3-540-87700-4 http://ls11-www.cs.uni-dortmund.de/ppsn/ppsn10/ Download Glaß M. , Lukasiewycz M. , Wanka R. Haubelt C. , Teich J. Multi-objective routing and topology optimization in networked embedded systems Int. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS) (Samos In: Proc. 8th Int. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS) 2008 10.1109/ICSAMOS.2008.4664849 Download Hannig F. Ruckdeschel H. , Dutta H. , Teich J. PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications Fourth International Workshop on Applied Reconfigurable Computing (ARC) (London 26. März 2008 - 28. März 2008 )In: Proceedings of the Fourth International Workshop on Applied Reconfigurable Computing , Berlin Heidelberg 2008 10.1007/978-3-540-78610-8_30 Download Hannig F. Ruckdeschel H. , Teich J. The PAULA Language for Designing Multi-Dimensional Dataflow-Intensive Applications GI/ITG/GMM-Workshop -- Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Freiburg 3. März 2008 - 5. März 2008 )In: Proceedings of the GI/ITG/GMM-Workshop -- Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2008 Download Haubelt C. , Koch D. , Teich J. Efficient reconfigurable on-chip buses for fpgas 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08 (Palo Alto, California In: Proceedings 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2008) 2008 10.1109/FCCM.2008.33 Download Haubelt C., Schlichter T., Keinert J., Meredith M.:SystemCoDesigner: Automatic design space exploration and rapid prototyping from behavioral models 45th Design Automation Conference, DAC (Anaheim, CA 8. Juni 2008 - 13. Juni 2008 )In: Proceedings of 2008 ACM/EDAC/IEEE Design Automation Conference (DAC 2008) 2008 10.1109/DAC.2008.4555883 Download Helwig S. , Wanka R. Theoretical Analysis of Initial Particle Swarm Behavior 10th International Conference on Parallel Problem Solving from Nature (PPSN08) (Dortmund 13. September 2008 - 17. September 2008 )In: Proceedings of the 10th International Conference on Parallel Problem Solving from Nature , Berlin, Heidelberg 2008 10.1007/978-3-540-87700-4_88 http://www12.informatik.uni-erlangen.de/people/helwig/publications/HW08.php Download Jordan JM. , Helwig S. , Wanka R. Social Interaction in Particle Swarm Optimization, the Ranked FIPS, and Adaptive Multi-Swarms Genetic and Evolutionary Computation Conference (GECCO08) (Atlanta, Georgia 12. Juli 2008 - 16. Juli 2008 )In: ACM Press (Hrsg.): Proceedings of the Genetic and Evolutionary Computation Conference 2008 10.1145/1389095.1389103 http://www12.informatik.uni-erlangen.de/people/helwig/publications/JHW08.php Download Keinert J. , Haubelt C. , Teich J. Automatic Synthesis of Design Alternatives for Fast Stream-Based Out-of-Order Communication 2008 IFIP/IEEE WG 10.5 International Conference on Very Large Scale Integration, (VLSI-SoC 2008) (Rhodes Island 13. Oktober 2008 - 15. Oktober 2008 )In: Proceedings of the 2008 IFIP/IEEE WG 10.5 International Conference on Very Large Scale Integration, (VLSI-SoC 2008) 2008 Download Keinert J. , Haubelt C. , Teich J. Synthesis of multi-dimensional high-speed FIFOs for out-of-order communication 21st International Conference on Architecture of Computing Systems, ARCS 2008 (Dresden 25. Februar 2008 - 28. Februar 2008 )In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS 2008) 2008 10.1007/978-3-540-78153-0_11 Download Kissler D. , Strawetz A. , Hannig F. Teich J. Power-efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures 18th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (Lisbon 10. September 2008 - 12. September 2008 )In: Proceedings of the 18th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2008 Download Kupriyanov O. , Hannig F. Kissler D. , Teich J. MAML: An ADL for Designing Single and Multiprocessor Architectures In: Prabhat Mishra and Nikil Dutt (Hrsg.): Processor Description Languages Elsevier Inc. 2008 , S. 295-327 (Systems on Silicon Series)ISBN: 9780123742872 10.1016/B978-012374287-2.50015-X Download Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. A feasibility-preserving local search operator for constrained discrete optimization problems 2008 IEEE Congress on Evolutionary Computation, CEC 2008 (Hong Kong In: Proceedings of the 2008 IEEE Congress on Evolutionary Computation (CEC 2008) 2008 10.1109/CEC.2008.4631058 Download Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. Efficient symbolic multi-objective design space exploration 2008 Asia and South Pacific Design Automation Conference, ASP-DAC (Seoul 10.1109/ASPDAC.2008.4484040 Download Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. Regler R. , Lang B. :Concurrent topology and routing optimization in automotive network integration 45th Design Automation Conference, DAC (Anaheim, CA 8. Juni 2008 - 13. Juni 2008 )In: Proceedings of the 2008 ACM/EDAC/IEEE Design Automation Conference (DAC 2008) 2008 10.1109/DAC.2008.4555893 Download Reimann F. , Glaß M. , Lukasiewycz M. , Keinert J. , Haubelt C. , Teich J. Symbolic voter placement for dependability-aware system synthesis Embedded Systems Week 2008 - 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008 (Atlanta, GA 19. Oktober 2008 - 24. Oktober 2008 )In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2008 10.1145/1450135.1450190 Download Schaffer R. , Merker R. , Hannig F. Teich J. Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism 11th Euromicro Conference on Digital System Design (DSD) (Parma 3. September 2008 - 5. September 2008 )In: Proceedings of the 11th Euromicro Conference on Digital System Design , New York 2008 10.1109/DSD.2008.24 Download Schmid M. , Ziener D. , Teich J. Netlist-Level IP Protection by Watermarking for LUT-Based FPGAs IEEE International Conference on Field-Programmable Technology (FPT ) (Taipei 7. Dezember 2008 - 10. Dezember 2008 )In: Proceedings of IEEE International Conference on Field-Programmable Technology , New York 2008 10.1109/FPT.2008.4762385 Download Streichert T. :Self-Adaptive Hardware/Software Reconfigurable Networks - Concepts, Methods, and Implementation 2008 )Download Streichert T. , Glaß M. , Wanka R. Haubelt C. , Teich J. Topology-aware replica placement in fault-tolerant embedded networks 21st International Conference on Architecture of Computing Systems (ARCS) (Dresden 25. Februar 2008 - 28. Februar 2008 )In: Proc. 21st International Conference on Architecture of Computing Systems (ARCS) 2008 10.1007/978-3-540-78153-0_4 http://www12.cs.fau.de/people/rwanka/publications/SGWHT08.php Download Streichert T. , Koch D. , Haubelt C. , Teich J. Concepts for self-adaptive and self-healing networked embedded systems In: Rolf Würtz (Hrsg.): Organic Computing Springer 2008 , S. 241-260 (Springer Series Understanding Complex Systems)ISBN: 9783540776567 10.1007/978-3-540-77657-4_11 Download Streubühr M. , Jäntsch M. , Haubelt C. , Teich J. Schneider A. :Semi-Automatic Generation of mixed Hardware-Software Prototypes from Simulink Models 11. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Freiburg 3. März 2008 - 5. März 2008 )In: 11. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2008 Download Teich J. Foreword DFG SPP1148 session: 2008 International Conference on Field Programmable Logic and Applications, FPL (Heidelberg 10.1109/FPL.2008.4629962 Download Teich J. Invasive Algorithms and Architectures it - Information Technology 50 2008 ), S. 300-310 ISSN: 1611-2776 Download Teich J. Platzner M. :Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL: Preface 2008 International Conference on Field Programmable Logic and Applications, FPL (Heidelberg 10.1109/FPL.2008.4629893 Download Teich J. Wildermann S. A Sequential Learning Resource Allocation Network for Image Processing Applications 8th International Conference on Hybrid Intelligent Systems (Barcelona 10. September 2008 - 12. September 2008 )In: Proceedings of the 8th International Conference on Hybrid Intelligent Systems , New York 2008 10.1109/HIS.2008.101 Download Wanka R. Paralleles Sortieren - Parallel geht schnell In: Taschenbuch der Algorithmen Berlin Heidelberg Springer 2008 , S. 31-41 ISBN: 978-3-540-76393-2 10.1007/978-3-540-76394-9_4 Download Wanka R. Paralleles Sortieren - Parallel geht schnell In: Vöcking B (Hrsg.): Taschenbuch der Algorithmen Berlin Heidelberg Springer 2008 , S. 31-41 ISBN: 978-3-540-76393-2 10.1007/978-3-540-76394-9_4 Download Wildermann S. Teich J. 3D Person Tracking with a Color-Based Particle Filter RobVis'2008 (Auckland 18. Februar 2008 - 20. Februar 2008 )In: Robot Vision , Berlin 2008 10.1007/978-3-540-78157-8_25 Download Wildermann S. Teich J. Theoretical Analysis of Fair Bandwidth Sharing in Priority-based Medium Access 2008 )Download Wolinski C. , Kuchcinski K. , Teich J. Hannig F. Area and Reconfiguration Time Minimization of the Communication Network in Regular 2D Reconfigurable Architectures International Conference on Field Programmable Logic and Applications (FPL) (Heidelberg 8. September 2008 - 10. September 2008 )In: Proceedings of the International Conference on Field Programmable Logic and Applications , New York 2008 10.1109/FPL.2008.4629969 Download Wolinski C. , Kuchcinski K. , Teich J. Hannig F. Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures 11th Euromicro Conference on Digital System Design (DSD) (Parma 3. September 2008 - 5. September 2008 )In: Proceedings of the 11th Euromicro Conference on Digital System Design , New York 2008 10.1109/DSD.2008.1 Download Wolinski C. , Kuchcinski K. , Teich J. Hannig F. Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures 16th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM) (Palo Alto, CA 14. April 2008 - 15. April 2008 )In: Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines 2008 10.1109/FCCM.2008.16 Download Zebelein C. , Falk J. Haubelt C. , Teich J. Classification of general data flow actors into known models of computation 6th ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'08 (Anaheim, CA 5. Juli 2008 - 7. Juli 2008 )In: Proc. of the Sixth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2008) 2008 10.1109/MEMCOD.2008.4547699 Download Ziener D. , Teich J. Concepts for Autonomous Control Flow Checking for Embedded CPUs 5th International Conference on Autonomic and Trusted Computing (ATC-08) (Oslo 23. Juni 2008 - 25. Juni 2008 )In: Proceedings of the 5th International Conference on Autonomic and Trusted Computing (ATC-08) , Berlin, Heidelberg 2008 10.1007/978-3-540-69295-9_20 Download Ziener D. , Teich J. Power Signature Watermarking of IP Cores for FPGAs Journal of Signal Processing Systems For Signal Image and Video Technology 51 2008 ), S. 123-136 ISSN: 1939-8018 10.1007/s11265-007-0136-8 Download
2007 Ahmadinia A. , Bobda C. , Fekete SP. , Teich J. Van Der Veen JC. :Optimal free-space management and routing-conscious dynamic placement for reconfigurable devices IEEE Transactions on Computers 56 2007 ), S. 673-680 ISSN: 0018-9340 10.1109/TC.2007.1028 Download Angermeier J. , Fekete SP. , Göhringer D. , Majer M. , Teich J. Van Der Veen JC. :Scheduling and communication-aware mapping of HW-SW modules for dynamically and partially reconfigurable SoC architectures ARCS '07 - 20th International Conference on Architecture of Computing Systems (Zurich In: Proc. of the 20th International Conference on Architecture of Computing Systems , Berlin 2007 Download Angermeier J. , Göhringer D. , Majer M. , Teich J. Fekete SP. , Van Der Veen JC. :The Erlangen Slot Machine: A Platform for Interdisciplinary Research in Reconfigurable Computing it - Information Technology 49 2007 ), S. 143-148 ISSN: 1611-2776 Download Bergmann N. , Platzner M. , Teich J. Dynamically Reconfigurable Architectures EURASIP Journal on Embedded Systems 2007 2007 ), S. Article ID 28405, 2 pages ISSN: 1687-3955 Download Bobda C. , Majer M. , Teich J. Ahmadinia A. :The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-Based Computer Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 47 2007 ), S. 15-31 ISSN: 1387-5485 Download Dittmann Florian, Rammig Franz, Streubühr Martin, Haubelt Christian, Schallenberg Andreas, Nebel Wolfgang:Exploration, Partitioning and Simulation of Reconfigurable Systems it - Information Technology 49 2007 ), S. 149-156 ISSN: 1611-2776 Download Dutta H. , Hannig F. Kupriyanov O. , Kissler D. , Teich J. Schaffer R. , Siegel S. , Merker R. , Pottier B. :Massively Parallel Processor Architectures: A Co-design Approach 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC) (Montpellier 18. Juni 2007 - 20. Juni 2007 )In: Proceedings of the 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC) 2007 Download Dutta H. , Hannig F. Ruckdeschel H. , Teich J. Efficient Control Generation for Mapping Nested Loop Programs onto Processor Arrays Journal of Systems Architecture 53 2007 ), S. 300-309 ISSN: 1383-7621 10.1016/j.sysarc.2006.10.009 Download Falk J. Haubelt C. , Teich J. Task Graph Clustering with Internal State 2007 )Download Glaß M. , Lukasiewycz M. , Haubelt C. , Streichert T. , Teich J. Synthese zuverlässiger und flexibler Systeme Zuverlässigkeit und Entwurf (ZuD 2007) (Munich 26. März 2007 - 28. März 2007 )In: Proceedings of Zuverlässigkeit und Entwurf (ZuD 2007) 2007 Download Haubelt C. , Falk J. Keinert J. , Schlichter T. , Streubühr M. , Deyhle A. , Hadert A. , Teich J. A SystemC-based Design Methodology for Digital Signal Processing Systems EURASIP Journal on Embedded Systems 2007 2007 ), S. Article ID 47580, 22 pages ISSN: 1687-3955 10.1155/2007/47580 Download Haubelt C. , Teich J. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen Aachen Shaker Verlag 2007 Download Helwig S. , Wanka R. Particle Swarm Optimization in High-Dimensional Bounded Search Spaces IEEE Swarm Intelligence Symposium 2007 (Honolulu, Hawaii 1. April 2007 - 5. April 2007 )In: Proceedings of the 2007 IEEE Swarm Intelligence Symposium 2007 10.1109/SIS.2007.368046 http://www12.informatik.uni-erlangen.de/people/helwig/publications/HW07.php Download Keinert J. , Falk J. Haubelt C. , Teich J. Actor-oriented modeling and simulation of sliding window image processing algorithms 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2007 (Salzburg 4. Oktober 2007 - 5. Oktober 2007 )In: Proceedings of the 2007 IEEE/ACM/IFIP Workshop of Embedded Systems for Real-Time Multimedia (ESTIMEDIA 2007) 2007 10.1109/ESTMED.2007.4375815 Download Keinert J. , Haubelt C. , Teich J. Simulative buffer analysis of local image processing algorithms described by windowed synchronous data flow 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2007 (Samos 16. Juli 2007 - 19. Juli 2007 )In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, Acoustics, Speech, and Signal Processing (IC-SAMOS VII) 2007 10.1109/ICSAMOS.2007.4285747 Download Kissler D. , Hannig F. Teich J. Schwach-programmiert macht stark Design & Elektronik 2007 ), S. 34-39 ISSN: 0933-8667 Download Koch D. , Beckhoff C. , Teich J. Bitstream Decompression for High Speed FPGA Configuration from Slow Memories IEEE International Conference on Field-Programmable Technology 2007 (ICFPT'07) (Kokurakita, Kitakyushu 12. Dezember 2007 - 14. Dezember 2007 )In: Proc. of the IEEE International Conference on Field-Programmable Technology 2007 , New York 2007 10.1109/FPT.2007.4439245 Download Koch D. , Haubelt C. , Streichert T. , Teich J. Modeling and synthesis of hardware-software morphing 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 (New Orleans, LA In: Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007) 2007 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=34548813114&origin=inward Download Koch D. , Haubelt C. , Teich J. Efficient hardware checkpointing: Concepts, overhead analysis, and implementation FPGA 2007: Fifteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (Monterey, CA 18. Februar 2007 - 20. Februar 2007 )In: Proceedings of the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2007) 2007 10.1145/1216919.1216950 Download Kupriyanov O. , Hannig F. Kissler D. , Teich J. Lallet J. , Sentieys O. , Pillement S. :Modeling of interconnection networks in massively parallel processor architectures 20th International Conference on Architecture of Computing Systems, ARCS 2007 (Zurich 12. März 2007 - 15. März 2007 )In: Proceedings of the 20th International Conference on Architecture of Computing Systems (ARCS 2007) 2007 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=37249015485&origin=inward Download Kupriyanov O. , Kissler D. , Hannig F. Teich J. Efficient event-driven simulation of parallel processor architectures 10th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2007 (Nice In: Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2007 10.1145/1269843.1269854 Download Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. SAT-decoding in evolutionary algorithms for discrete constrained optimization problems 2007 IEEE Congress on Evolutionary Computation, CEC 2007 (Singapore 25. September 2007 - 28. September 2007 )In: In Proceedings of the 2007 IEEE Congress on Evolutionary Computation (CEC 2007) 2007 10.1109/CEC.2007.4424570 Download Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. Solving multi-objective Pseudo-Boolean problems 10th International Conference on Theory and Applications of Satisfiability Testing, SAT 2007 (Lisbon 28. Mai 2007 - 31. Mai 2007 )In: Proceedings of Tenth International Conference on Theory and Applications of Satisfiability Testing (SAT 2007) 2007 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=38049113235&origin=inward Download Lukasiewycz M. , Glaß M. , Haubelt C. , Teich J. Symbolic archive representation for a fast nondominance test 4th International Conference on Evolutionary Multi-Criterion Optimization, EMO 2007 (Matsushima 5. März 2007 - 8. März 2007 )https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=37249008208&origin=inward Download Niemann B. , Haubelt C. , Uribe M. , Teich J. Formalizing TLM with Communicating State Machines In: Sorin A. Huss (Hrsg.): Advances in Design and Specification Languages for Embedded Systems Springer 2007 , S. 225-242 Download Paetzold K. , Wittmann S. , Stoll T. , Helwig S. :Registration of measured and simulated non-ideal geometry using optimization methods. 10th CIRP International Seminar on Computet Aided Tolerancing (Erlangen In: International Seminar on Computet Aided Tolerancing 2007 Download Riess C. , Wanka R. Periodic Load Balancing on the N-Cycle: Analytical and Experimental Evaluation 13th International Euro-Par Conference (Rennes 28. August 2007 - 31. August 2007 )In: Proceedings of the 13th International Euro-Par Conference 2007 10.1007/978-3-540-74466-5_86 Download Riess C. , Wanka R. Periodic Load Balancing on the N-Cycle: Analytical and Experimental Evaluation 13th European Conference in Parallel Processing Euro-Par'07, (Rennes 27. August 2007 - 31. August 2007 )In: Kermarrec Anne-Marie, Bougé Luc, Priol Thierry (Hrsg.): Proc. 13th European Conference in Parallel Processing (Euro-Par) 2007 10.1007/978-3-540-74466-5_86 http://www12.informatik.uni-erlangen.de/people/rwanka/publications/pdf/RW07.pdf Download Stechele W. , Bringmann O. , Ernst R. , Herkersdorf A. , Hojenski K. , Janacik P. , Rammig F. , Teich J. Wehn N. , Zeppenfeld J. , Ziener D. :Autonomic MPSoCs for Reliable Systems Zuverlässigkeit und Entwurf (ZuD ) (Munich In: Proceedings of Zuverlässigkeit und Entwurf (ZuD 2007) 2007 Download Stechele W. , Bringmann O. , Ernst R. , Herkersdorf A. , Hojenski K. , Janacik P. , Rammig F. , Teich J. Wehn N. , Zeppenfeld J. , Ziener D. :Concepts for Autonomic Integrated Systems edaWorkshop07 (Hannover In: Proceedings of edaWorkshop07 , Berlin 2007 Download Streichert T. , Busse M. :Time Synchronization In: Algorithms for Sensor and Ad Hoc Networks Berlin Heidelberg Springer 2007 , S. 359-380 (Lecture Notes in Computer Science (LNCS), Bd.4621)ISBN: 978-3-540-74990-5 http://www.springer.com/computer/communications/book/978-3-540-74990-5 Download Streichert T. , Glaß M. , Haubelt C. , Teich J. Design space exploration of reliable networked embedded systems Journal of Systems Architecture 53 2007 ), S. 751-763 ISSN: 1383-7621 10.1016/j.sysarc.2007.01.005 Download Streichert T. , Strengert C. , Koch D. , Teich J. Haubelt C. :Communication Aware Optimization of the Task Binding in Hardware/Software Reconfigurable Networks Journal of Integrated Circuits and Systems 2007 ), S. 29-36 ISSN: 1807-1953 Download Streubühr M. , Riedel C. , Haubelt C. , Teich J. System Level Modeling and Performance Simulation for Dynamic Reconfigurable Computing Systems in SystemC 10. Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (Erlangen 5. März 2007 - 7. März 2007 )In: Proceedings of 10. Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" 2007 Download Teich J. Reconfigurable Computing Systems it - Information Technology 49 2007 ), S. 139-142 ISSN: 1611-2776 Download Glaß M., Lukasiewycz M., Streichelt T., Haubelt C., Teich J.:Reliability-aware system synthesis 2007 Design, Automation and Test in Europe Conference and Exhibition (Nice Acropolis 16. April 2007 - 20. April 2007 )In: Proceedings of Design, Automation and Test in Europe (DATE 2007) 2007 10.1109/DATE.2007.364626 Download Teich J. Hannig F. Ruckdeschel H. , Dutta H. , Kissler D. , Stravet A. :A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) (Las Vegas, NV 25. Juni 2007 - 28. Juni 2007 )In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) 2007 Download Teich J. Haubelt C. :Digitale Hardware/Software-Systeme: Synthese und Optimierung Berlin Springer 2007 ISBN: 978-3-540-46822-6 http://www.springer.com/computer/hardware/book/978-3-540-46822-6 Download
2006 Ahmadinia A. :Optimization Algorithms for Dynamically Reconfigurable Embedded Systems 2006 )Download Ahmadinia A. , Bobda C. , Teich J. Online Placement for Dynamically Reconfigurable Devices EURASIP Journal on Embedded Systems 1 2006 ), S. 165-178 ISSN: 1687-3955 Download Becker J. , Teich J. Athanas P. , Brebner G. (Hrsg.):Dynamically Reconfigurable Architectures 2006 Download Bhattacharyya SS. , Teich J. Analysis of Dataflow Programs with Interval-limited Data-rates Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology Vol. 43, Nos. 2-3 2006 ), S. 247-258 ISSN: 1387-5485 10.1007/s11265-006-7274-2 Download Bunin G. , Schneider A. , Haubelt C. , Langer J. , Heinkel U. :Automatic Test Case Generation with Model Checker NuSMV Informatik 2006 - Workshop Modellbasiertes Testen (Dresden 2. Oktober 2006 - 10. Oktober 2006 )In: Proceedings of the Informatik 2006 - Workshop Modellbasiertes Testen 2006 Download Dutta H. , Hannig F. Heigl B. , Hornegger H. , Teich J. A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing IEEE 17th International Conference on Application-specific Systems, Architectures, and Processors (ASAP) (Steamboat Springs, CO 11. September 2006 - 13. September 2006 )In: Proceedings of IEEE 17th International Conference on Application-specific Systems, Architectures, and Processors 2006 10.1109/ASAP.2006.4 Download Dutta H. , Hannig F. Teich J. A Formal Methodology for Hierarchical Partitioning of Piecewise Linear Algorithms In: Technical Report 04-2006 2006 Download Dutta H. , Hannig F. Teich J. Controller Synthesis for Mapping Partitioned Programs on Array Architectures 19th International Conference on Architecture of Computing Systems (ARCS) (Frankfurt am Main 13. März 2006 - 16. März 2006 )In: Proceedings of the 19th International Conference on Architecture of Computing Systems , Berlin, Heidelberg, New York 2006 10.1007/11682127_13 Download Dutta H. , Hannig F. Teich J. Hierarchical Partitioning for Piecewise Linear Algorithms 5th International Conference on Parallel Computing in Electrical Engineering (PARELEC) (Bialystok 13. September 2006 - 17. September 2006 )In: Proceedings of the 5th International Conference on Parallel Computing in Electrical Engineering 2006 10.1109/PARELEC.2006.43 Download Dutta H. , Hannig F. Teich J. Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays: Architectural Parameters and Methodology International Journal of Embedded Systems 2 2006 ), S. 114-127 ISSN: 1741-1068 Download Dutta H. , Hannig F. Teich J. Mapping of Nested Loop Programs onto Massively Parallel Processor Arrays with Memory and I/O Constraints 6th International Heinz Nixdorf Symposium, New Trends in Parallel & Distributed Computing (Paderborn 17. Januar 2006 - 18. Januar 2006 )In: Proceedings of the 6th International Heinz Nixdorf Symposium, New Trends in Parallel & Distributed Computing , Paderborn, Germany 2006 Download Falk J. Haubelt C. , Teich J. Efficient Representation and Simulation of Model-Based Designs in SystemC FDL'06, Forum on Design Languages 2006 (Darmstadt 29. September 3006 - 22. September 2006 )In: Proceedings FDL'06, Forum on Design Languages 2006 2006 Download Fekete SP. , Van Der Veen JC. , Majer M. , Teich J. Minimizing communication cost for reconfigurable slot modules 16th International Conference on Field Programmable Logic and Applications (FPL06) (Madrid 28. August 2006 - 30. August 2006 )In: Proceedings of 16th International Conference on Field Programmable Logic and Applications 2006 10.1109/FPL.2006.311263 Download Glaß M. :Designing Low Power Hardware / Software Systems 1st Chinese-German Summer School (Shanghai In: Proceedings of the 1st Chinese-German Summer School , Erlangen 2006 Download Göhringer D. , Majer M. , Teich J. Bridging the Gap between Relocation and Available Technology: The Erlangen Slot Machine Dynamically Reconfigurable Architectures (Dagstuhl In: Proceedings of the Dagstuhl Seminar Nº 06141 on Dynamically Reconfigurable Architectures , Dagstuhl, Germany 2006 http://drops.dagstuhl.de/opus/volltexte/2006/736 Download Hannig F. Dutta H. , Teich J. Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays -- Architectural Parameters and Methodology International Journal of Embedded Systems 2 2006 ), S. 114-127 ISSN: 1741-1068 10.1504/IJES.2006.010170 Download Hannig F. Merker R. , Siegel S. , Teich J. Communication-conscious Mapping of Regular Nested Loop Programs onto Massively Parallel Processor Arrays 18th International Conference on Parallel and Distributed Computing and Systems (PDCS) (Dallas, TX 13. November 2006 - 15. November 2006 )In: Proceedings of the 18th International Conference on Parallel and Distributed Computing and Systems 2006 Download Haubelt C. , Schlichter T. , Teich J. Improving Automatic Design Space Exploration by Integrating Symbolic Techniques into Multi-Objective Evolutionary Algorithms International Journal of Computational Intelligence Research 2 2006 ), S. 239-254 ISSN: 0973-1873 Download Keinert J. , Haubelt C. , Teich J. Modeling and analysis of windowed synchronous algorithms 2006 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2006 (Toulouse 14. Mai 2006 - 19. Mai 2006 )In: Proceedings of the 31st International Conference on Acoustics, Speech, and Signal Processing (ICASSP2006) 2006 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=33947613533&origin=inward Download Kissler D. , Hannig F. Kupriyanov O. , Teich J. A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template 2nd International Workshop on Reconfigurable Communication-Centric System-on-Chips (ReCoSoC) (, 3. Juli 2006 - 5. Juli 2006 )In: Proceedings of the 2nd International Workshop on Reconfigurable Communication-Centric System-on-Chips (ReCoSoC) 2006 Download Kissler D. , Hannig F. Kupriyanov O. , Teich J. Hardware cost analysis for weakly programmable processor arrays 2006 International Symposium on System-on-Chip, SOC (Tampere 14. November 2006 - 16. November 2006 )In: Proceedings of the International Symposium on System-on-Chip (SoC) 2006 10.1109/ISSOC.2006.321996 Download Kissler D. , Kupriyanov O. , Hannig F. Koch D. , Teich J. A Generic Framework for Rapid Prototyping of System-on-Chip Designs International Conference on Computer Design (CDES) (Las Vegas, NV In: Proceedings of the International Conference on Computer Design (CDES) 2006 Download Kissler D. , Kupriyanov O. , Hannig F. Teich J. A highly parameterizable parallel processor array architecture 2006 IEEE International Conference on Field Programmable Technology, FPT 2006 (Bangkok 13. Dezember 2006 - 15. Dezember 2006 )In: Proceedings of the IEEE International Conference on Field Programmable Technology (FPT 2006) 2006 10.1109/FPT.2006.270293 Download Koch D. , Streichert T. , Dittrich S. , Strengert C. , Haubelt C. , Teich J. An operating system infrastructure for fault-tolerant reconfigurable networks 19th International Conference on Architecture of Computing Systems, ARCS 2006 (Frankfurt, Main 13. März 2006 - 16. März 2006 )In: Proceedings of the 19th International Conference on Architecture of Computing Systems (ARCS 2006) 2006 10.1007/11682127_15 Download Koch D. , Streichert T. , Teich J. Haubelt C. :Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems EURASIP Journal on Embedded Systems 2006 2006 ), S. 1 - 15 ISSN: 1687-3955 10.1155/ES/2006/42168 Download Koch D. , Teich J. Körber M. :Searching RC5-Keys with Distributed Reconfigurable Computing International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA ) (Las Vegas 26. Juni 2006 - 29. Juni 2006 )In: Proceedings of International Conference on Engineering of Reconfigurable Systems and Algorithms , USA 2006 Download Kupriyanov O. , Hannig F. Kissler D. , Schaffer R. , Teich J. MAML - An Architecture Description Language for Modeling and Simulation of Processor Array Architectures, Part I In: Technical Report 03-2006 2006 Download Kupriyanov O. , Hannig F. Kissler D. , Teich J. Lallet J. , Sentieys O. , Pillement S. :Modeling of Interconnection Networks in Massively Parallel Processor Architectures In: Technical Report 05-2006 2006 Download Kupriyanov O. , Hannig F. Kissler D. , Teich J. Schaffer R. , Merker R. :An Architecture Description Language for Massively Parallel Processor Architectures 9th ITG/GMM/GI Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Dresden 20. Februar 2006 - 22. Februar 2006 )In: Proceedings of the 9th ITG/GMM/GI Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2006 Download Köker K. , Membarth R. , German R. :Performance Analyses of Embedded Real-time Operating Systems using High-precision Counters ICARA (Palmerston North In: Proc. 3rd Int. Conf. on Autonomous Robots and Agents 2006 Download Lukasiewycz M. :Model-Based Embedded System Design 1st Chinese-German Summer School (Shanghai In: Proceedings of the 1st Chinese-German Summer School , Erlangen 2006 Download Majer M. :An FPGA-Based Dynamically Reconfigurable Platform: from Concept to Realization 16th International Conference on Field Programmable Logic and Applications (Madrid 28. August 2006 - 30. August 2006 )In: Proceedings of 16th International Conference on Field Programmable Logic and Applications 2006 10.1109/FPL.2006.311364 Download Majer M. , Ahmadinia A. , Bobda C. , Teich J. A Flexible Reconfiguration Manager for the Erlangen Slot Machine M. Majer, A. Ahmadinia, C. Bobda and J. Teich (Frankfurt/Main 16. März 2003 - 16. März 2003 )In: Proceedings of the Dynamically Reconfigurable Systems Workshop (DRS'2006) 2006 Download Niemann B. , Haubelt C. :Assertion-Based Verification of Transaction Level Models 9th ITG/GMM/GI Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Dresden 20. Februar 2006 - 22. Februar 2006 )In: Proceedings of the 9th ITG/GMM/GI Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2006 Download Niemann B. , Haubelt C. :Formalizing TLM with Communicating State Machines Forum on Specification and Design Languages (FDL'06) (Darmstadt 29. September 3006 - 22. September 2006 )In: Proceedings Forum on Specification and Design Languages (FDL'06) 2006 Download Reimann F. :Reconfigurable Computing Architectures 1st Chinese-German Summer School (Shanghai 18. September 2006 - 28. September 2006 )In: Proceedings of the 1st Chinese-German Summer School 2006 Download Schlichter T. , Lukasiewycz M. , Haubelt C. , Teich J. Improving system level design space exploration by incorporating SAT-solvers into multi-objective evolutionary algorithms IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006 (Klarlsruhe 2. März 2006 - 3. März 2006 )In: Proceedings of IEEE Computer Society Annual Symposium on VLSI. Karlsruhe 2006 10.1109/ISVLSI.2006.57 Download Schneider A. , Bunin G. , Haubelt C. , Heinkel U. :Automatic Test Generation with Model Checking Techniques Conference on Quality Engineering in Software Technology (CONQUEST2006) (Berlin 27. September 2006 - 29. September 2006 )In: Software Quality in Service-Oriented Architectures Proceedings of the Conference on Quality Engineering in Software Technology (CONQUEST2006) 2006 Download Streichert T. :Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks 16th International Conference on Field Programmable Logic and Applications (Madrid 28. August 2006 - 30. August 2006 )In: Proceedings of 16th International Conference on Field Programmable Logic and Applications 2006 10.1109/FPL.2006.311346 Download Streichert T. :Power Aware Design 1st Chinese-German Summer School (Shanghai In: Proceedings of the 1st Chinese-German Summer School , Erlangen 2006 Download Streichert T. , Haubelt C. , Teich J. Multi-objective topology optimization for networked embedded systems 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2006 (Samos 17. Juli 2006 - 20. Juli 2006 )In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS 2006) 2006 10.1109/ICSAMOS.2006.300814 Download Streichert T. , Strengert C. , Haubelt C. , Teich J. Dynamic task binding for hardware/software reconfigurable networks SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design (Ouro Preto In: In Proceedings of SBCCI 2006 2006 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=33750914830&origin=inward Download Streubühr M. , Falk J. Teich J. Haubelt C. , Dorsch R. , Schlipf T. :Task-accurate performance modeling in SystemC for real-time multi-processor architectures Design, Automation and Test in Europe, DATE'06 (Munich 6. März 2006 - 10. März 2006 )In: Proceedings of Design, Automation and Test in Europe (DATE 2006), IEEE Computer Society 2006 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=34047100936&origin=inward Download Teich J. Are Current ESL Tools Meeting the Requirements of Advanced Embedded Systems? 4th international conference on Hardware/software codesign and system synthesis (Seoul 22. Oktober 2006 - 25. Oktober 2006 )In: CODES ISSS '06: Proceedings of the 4th international conference on Hardware/software codesign and system synthesis , New York, NY, USA 2006 10.1145/1176254.1176295 Download Teich J. Stochastic Timing Analysis of Communicating Tasks with Internal State In: Technical Report 02-2006 2006 Download Teich J. Timing Analysis of Systems of Communicating Tasks with Internal State In: Technical Report 01-2006, 2006 Download Teich J. Fekete SP. , Köhler E. :Higher-dimensional packing with order constraints SIAM Journal on Discrete Mathematics 2006 ), S. 1056-1078 ISSN: 0895-4801 Download Teich J. Kaxiras S. , Plaks T. , Flautner K. :Topic 18: Embedded Parallel Systems Euro-Par 2006 Parallel Processing (Dresden 28. August 2006 - 1. September 2006 )In: Proceedings of the 12th International Euro-Par Conference , Berlin, Heidelberg, New York 2006 10.1007/11823285_124 Download Wanka R. Approximationsalgorithmen - Eine Einführung Wiesbaden Teubner 2006 ISBN: 978-3-519-00444-8 10.1007/978-3-8351-9067-2 Download Ziener D. , Aßmus Stefan AS. , Teich J. Identifying FPGA IP-Cores based on Lookup Table Content Analysis 16th International Conference on Field Programmable Logic and Applications (Madrid 28. August 2006 - 30. August 2006 )In: Proceedings of 16th International Conference on Field Programmable Logic and Applications 2006 10.1109/FPL.2006.311255 Download Ziener D. , Teich J. FPGA Core Watermarking Based on Power Signature Analysis IEEE International Conference on Field-Programmable Technology (FPT ) (Bangkok 13. Dezember 2006 - 15. Dezember 2006 )In: Proceedings of IEEE International Conference on Field-Programmable Technology 2006 10.1109/FPT.2006.270313 Download
2005 Ahmadinia A. , Bobda C. , Ding J. , Fekete SP. , Majer M. , Teich J. Van Der Veen JC. :A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices 16th IEEE International Workshop on Rapid System Prototyping (RSP) (Montreal 8. Juni 2005 - 10. Juni 2005 )In: Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping 2005 Download Ahmadinia A. , Bobda C. , Ding J. , Majer M. , Teich J. Modular Video Streaming on a Reconfigurable Platform IFIP VLSI-SoC (Perth In: IFIP VLSI-SOC 2005 2005 Download Ahmadinia A. , Bobda C. , Fekete SP. , Haller T. , Linarth AG. , Majer M. , Teich J. Van Der Veen JC. :The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (Marriott at Napa Valley, California 18. April 2005 - 20. April 2005 )In: Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05) 2005 10.1109/FCCM.2005.63 Download Ahmadinia A. , Bobda C. , Fekete SP. , Hannig F. Majer M. , Teich J. Van Der Veen JC. :Defragmenting the Module Layout of a Partially Reconfigurable Device International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA ) (Las Vegas, NV 27. Juni 2005 - 30. Juni 2005 )In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms 2005 Download Ahmadinia A. , Bobda C. , Fekete SP. , Majer M. , Teich J. Van Der Veen JC. :DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices International Conference on Field-Programmable Logic and Applications (FPL) (Tampere 24. August 2005 - 26. August 2005 )In: Proceedings of the International Conference on Field-Programmable Logic and Applications 2005 10.1109/FPL.2005.1515715 Download Ahmadinia A. , Bobda C. , Haller T. , Linarth AG. , Majer M. , Teich J. Increasing the Flexibility in FPGA-Based Reconfigurable Platforms: The Erlangen Slot Machine IEEE Conference on Field-Programmable Technology (FPT) (Singapore 11. Dezember 2005 - 14. Dezember 2005 )In: IEEE 2005 Conference on Field-Programmable Technology 2005 10.1109/FPT.2005.1568522 Download Ahmadinia A. , Bobda C. , Majer M. , Kurapati R. , Niyonkuru A. :Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs Dynamically Reconfigurable Systems, Self-Organization and Emergence (Innsbruck In: System Aspects in Organic and Pervasive Computing - Workshop Proceedings - Dynamically Reconfigurable Systems, Self-Organization and Emergence 2005 Download Ahmadinia A. , Bobda C. , Majer M. , Teich J. Packet Routing in Dynamically Changing Networks on Chip 12th Reconfigurable Architectures Workshop (RAW 2005) (Denver 4. April 2005 - 5. April 2005 )In: 2005 (Hrsg.): Proceedings of the 12th Reconfigurable Architectures Workshop (RAW 2005) 2005 Download Dinkel T. , Haubelt C. , Heinkel U. , Schlichter T. , Knäblein J. , Schock T. , Teich J. Comparison of Techniques for the Automatic Verification of ADeVA Specifications Dresdener Arbeitstagung Schaltungs- und Systementwurf (DASS 2005) (Dresden 13. April 2005 - 14. April 2005 )In: Proc. Dresdener Arbeitstagung Schaltungs- und Systementwurf (DASS 2005) 2005 Download Dinkel T. , Haubelt C. , Heinkel U. , Schlichter T. , Teich J. Automatische Verification von ADeVA-Spezifikationen GI/ITG/GMM-Workshop 2005 (Munich 6. April 2005 - 7. April 2005 )In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 2005 Download Dutta H. , Hannig F. Kupriyanov O. , Teich J. Schaffer R. , Siegel S. , Merker R. , Keryell R. , Pottier B. , Chillet D. , Ménard D. , Sentieys O. :Co-Design of Massively Parallel Embedded Processor Architectures First ReCoSoC Workshop (Montpellier In: Proceedings of the first ReCoSoC Workshop 2005 Download Dutta Hritam, Hannig Frank, Ruckdeschel Holger, Teich Jürgen:Automatic FIR Filter Generation for FPGAs Embedded Computer Systems: Architectures, Modeling, and Simulation. (Island of Samos 18. Juli 2005 - 20. Juli 2005 )In: In Proceedings of the 5th International Workshop on Embedded Computer Systems, Architectures, Modeling, and Simulation (SAMOS 2005) , Berlin, Heidelberg, New York 2005 Download Dutta H. , Hannig F. Teich J. Control Path Generation for Mapping Partitioned Dataflow-dominant Algorithms onto Array Architectures In: Technical Report 03-2005 2005 Download Falk J. Haubelt C. , Teich J. Representing Models of Computation in SystemC GI/ITG/GMM-Workshop 2005 (Munich 6. April 2005 - 7. April 2005 )Download Falk J. Haubelt C. , Teich J. Syntax and execution behavior of SysteMoC In: Technical Report 04-2005 2005 Download Hannig F. Teich J. Output Serialization for FPGA-based and Coarse-grained Processor Arrays International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA ) (Las Vegas, NV 27. Juni 2005 - 30. Juni 2005 )In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms 2005 Download Haubelt C. :Automatic Model-Based Design Space Exploration for Embedded Systems - A System Level Approach 2005 )Download Haubelt C. , Gamenik J. , Teich J. Initial Population Construction for Convergence Improvement of MOEAs In: Carlos A. Coello Coello, Arturo Hernández Aguirre, and Eckart Zitzler (Hrsg.): Evolutionary Multi-Criterion Optimization Springer 2005 , S. 191-205 (Lecture Notes in Computer Science, Bd.3410) Download Haubelt C. , Jersak M. , Richter K. , Strehl K. , Ziegenbein D. , Ernst R. , Teich J. Thiele L. :SPI-Workbench – Modellierung, Analyse und Optimierung eingebetteter Systeme In: Armin B. Cremers, Rainer Manthey, Peter Martini, and Volker Steinhage (Hrsg.): Proceedings of INFORMATIK 2005 - Informatik LIVE 2005 Download Haubelt C. , Otto S. , Grabbe C. , Teich J. A system-level approach to hardware reconfigurable systems 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (Shanghai 18. Januar 2005 - 21. Januar 2005 )In: Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC'05) 2005 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84861440285&origin=inward Download Helwig S. , Haubelt C. , Teich J. Modeling and analysis of indirect communication in Particle Swarm Optimization 2005 IEEE Congress on Evolutionary Computation, IEEE CEC 2005 (Edinburgh In: Proceedings of the 2005 IEEE Congress on Evolutionary Computation 2005 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=27144530244&origin=inward Download Keinert J. , Haubelt C. , Teich J. Windowed Synchronous Data Flow In: Technical Report 02-2005 2005 Download Mostaghim S. , Teich J. Quad-trees: A Data structure for storing Pareto-sets in Multi-objective Evolutionary Algorithms with Elitism In: Ajith Abraham and Lakhmi Jain and Robert Goldberg (Hrsg.): Evolutionary Multiobjective Optimization London Springer 2005 , S. 81-104 (Advanced Information and Knowledge Processing) Download Schlichter T. , Hannig F. Haubelt C. , Teich J. Using symbolic feasibility tests during design space exploration of heterogeneous multi-processor systems IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 (Samos In: Proceedings of Application-specific Systems, Architectures and Processors (ASAP) 2005 10.1109/ASAP.2005.64 Download Schlichter T. , Haubelt C. , Teich J. Improving EA-based design space exploration by utilizing symbolic feasibility tests GECCO 2005 - Genetic and Evolutionary Computation Conference (Washington, D.C. 25. Juni 2005 - 29. Juni 2005 )In: Beyer H.G.; O'Reilly U.M.; Arnold D.; Banzhaf W.; Blum C.; Bonabeau E.W.; Cantu-Paz E.; Dasgupta D.; Deb K.; et al (Hrsg.): Proceedings of Genetic and Evolutionary Computation Conference (GECCO) 2005 10.1145/1068009.1068336 Download Streichert T. , Haubelt C. , Teich J. Distributed HW/SW-partitioning for embedded reconfigurable networks Design, Automation and Test in Europe, DATE '05 (Munich 7. März 2005 - 11. März 2005 )In: Proceedings of DATE 2005, Munich 2005 10.1109/DATE.2005.123 Download Streichert T. , Haubelt C. , Teich J. Online hardware/software partitioning in networked embedded systems 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (Shanghai 18. Januar 2005 - 21. Januar 2005 )In: Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC'05) 2005 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=33745634653&origin=inward Download Streichert T. , Haubelt C. , Teich J. Verteilte HW/SW-Partitionierung für fehlertolerante rekonfigurierbare Netzwerke 17. ITG/GI/GMM Workshop für Testmethoden und Zuverlässigkeit und Fehlertoleranz von Schaltungen und Systemen (Innsbruck 27. Februar 2005 - 1. März 2005 )In: Proceedings of 17. ITG/GI/GMM Workshop für Testmethoden und Zuverlässigkeit und Fehlertoleranz von Schaltungen und Systemen 2005 Download Ziener D. , Teich J. Evaluation of Watermarking methods for FPGA-based IP-cores In: Technical Report 01-2005 2005 Download
2004 Ahmadinia A. :Optimization Algorithms for Dynamic Reconfigurable Embedded Systems International Conference on Field-Programmable Logic and Applications (FPL) (Antwerp 30. August 2004 - 1. September 2004 )In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL) 2004 Download Ahmadinia A. , Bobda C. , Bednara M. , Teich J. A New Approach for On-line Placement on Reconfigurable Devices International Parallel and Distributed Processing Symposium (IPDPS-2004), Reconfigurable Architectures Workshop (RAW-2004), (Santa Fé NM 26. April 2004 - 30. April 2004 )In: Proc. of the International Parallel and Distributed Processing Symposium (IPDPS-2004), Reconfigurable Architectures Workshop 2004 Download Ahmadinia A. , Bobda C. , Blodget B. , Hübner M. , Majer M. , Niyonkuru A. :Designing Partial and Dynamically Reconfigurable Applications on Xilinx Virtex-II FPGAs using HandelC In: Technical Report 03-2004 2004 Download Ahmadinia A. , Bobda C. , Danne K. , Teich J. Generation of Distributed Arithmetic Designs for Reconfigurable Applications GI/ITG Dynamically Reconfigurable Systems Workshop at the 17th International Conference on Architecture of Computing Systems Organic and Pervasive Computing (Augsburg In: GI/ITG Dynamically Reconfigurable Systems Workshop at the 17th International Conference on Architecture of Computing Systems Organic and Pervasive Computing 2004 Download Ahmadinia A. , Bobda C. , Ding J. , Teich J. Design and Implementation of Reconfigurable Multiple Bus on Chip (RMBoC) In: Technical Report 02-2004 2004 Download Ahmadinia A. , Bobda C. , Fekete SP. , Teich J. Van Der Veen JC. :Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices International Conference on Field-Programmable Logic and Applications (FPL) (Antwerp 30. August 2004 - 1. September 2004 )In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL) , Berlin 2004 Download Ahmadinia A. , Bobda C. , Kalte H. , Koch D. , Teich J. FPGA Architecture Extensions for Preemptive Multitasking and Hardware Defragmentation IEEE International Conference on Field-Programmable Technology (FPT) (Brisbane 6. Dezember 2004 - 8. Dezember 2004 )In: Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology 2004 Download Ahmadinia A. , Bobda C. , Koch D. , Majer M. , Teich J. A Dynamic NoC Approach for Communication in Reconfigurable Devices International Conference on Field-Programmable Logic and Applications (FPL) (Antwerp 30. August 2004 - 1. September 2004 )In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL) , London 2004 Download Ahmadinia A. , Bobda C. , Koch D. , Majer M. , Teich J. Task Scheduling for Heterogeneous Reconfigurable Computers 17th Symposium on Integrated Circuits and Systems Design (SBCCI) (Pernambuco 7. September 2004 - 11. September 2004 )In: Proceedings of the 17th Symposium on Integrated Circuits and Systems Design (SBCCI) 2004 Download Ahmadinia A. , Bobda C. , Teich J. A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware 17th International Conference on Architecture of Computing Systems (ARCS 2004) (Augsburg 23. März 2004 - 26. März 2004 )In: Proceedings of 17th International Conference on Architecture of Computing Systems, Lecture Notes in Computer Science , Berlin, Heidelberg 2004 Download Bambha N. , Bhattacharyya SS. , Teich J. Zitzler E. :Systematic Integration of Parameterized Local Search Techniques in Evolutionary Algorithms Genetic and Evolutionary Computation Conference (Seattle, Washington 26. Juni 2004 - 30. Juni 2004 )In: Proceedings of the Genetic and Evolutionary Computation Conference , Berlin, Heidelberg 2004 Download Bambha N. , Bhattacharyya SS. , Zitzler E. , Teich J. Systematic Integration of Parameterized Local Search Into Evolutionary Algorithms IEEE Transactions on Evolutionary Computation 8 2004 ), S. 137-155 ISSN: 1089-778X 10.1109/TEVC.2004.823471 Download Bednara M. :Design Automation for Massively Parallel Processor Arrays: Transforming Regular Algorithms to Reconfigurable Hardware 2004 )Download Bhattacharyya SS. , Deprettere E. , Teich J. Chapter 6 in Domain-Specific Processors: Systems, Architectures, Modeling, and Simulation New York, U.S.A., 2004 ISBN: 0-8247-4711-9 Download Bobda C. :CoreMap: A Rapid Prototyping Environment for Distributed Reconfigurable Systems International Journal of Embedded Systems 2004 )ISSN: 1741-1068 Download Bobda C. , Danne K. :Dynamic Reconfiguration of Distributed Arithmetic Controllers: Design Space Exploration and Trade-off Analysis Reconfigurable Architecture Workshop 2004 (Santa Fé NM 26. April 2004 - 30. April 2004 )In: Proc. Reconfigurable Architecture Workshop 2004 2004 Download Frauenheim T. , Hoffmann M. , König P. , Mostaghim S. , Teich J. Molecular Force Field Parameterization using Multi-Objective Evolutionary Algorithms Congress on Evolutionary Computation (CEC '04) (Portland 20. Juni 2004 - 23. Juni 2004 )In: Proceedings of the Congress on Evolutionary Computation (CEC '04) 2004 Download Hannig F. Dutta H. , Teich J. Mapping of Regular Nested Loop Programs to Coarse-grained Reconfigurable Arrays -- Constraints and Methodology 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), (Santa Fe, NM 26. April 2004 - 30. April 2004 )In: Proceedings of the 18th International Parallel and Distributed Processing Symposium 2004 Download Hannig F. Dutta H. , Teich J. Regular Mapping for Coarse-grained Reconfigurable Architectures IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP ) (Montreal, Quebec 17. Mai 2004 - 21. Mai 2004 )In: Proceedings of the 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing 2004 Download Hannig F. Kupriyanov O. , Teich J. Automatic and Optimized Generation of Compiled High-Speed RTL Simulators Workshop on Compilers and Tools for Constrained Embedded Systems (CTCES 2004) (Washington, DC In: Proceedings of the Workshop on Compilers and Tools for Constrained Embedded Systems (CTCES 2004) 2004 Download Hannig F. Teich J. Dynamic Piecewise Linear/Regular Algorithms Fourth International Conference on Parallel Computing in Electrical Engineering (PARELEC ) (Dresden 7. September 2004 - 10. September 2004 )In: Proceedings of the Fourth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004) 2004 Download Hannig F. Teich J. Energy Estimation and Optimization for Piecewise Regular Processor Arrays In: Chapter 6 in Domain-Specific Processors: Systems, Architectures, Modeling, and Simulation New York, U.S.A., Marcel Dekker 2004 , S. 107-126 (Signal Processing and Communication)ISBN: 0-8247-4711-9 Download Hannig F. Teich J. Resource Constrained and Speculative Scheduling of an Algorithm Class with Run-Time Dependent Conditionals 15th IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP ) (Galveston, TX 27. September 2004 - 29. September 2004 )In: Proceedings of the 15th IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP 2004) 2004 Download Hannig F. Teich J. Resource Constrained and Speculative Scheduling of Dynamic Piecewise Regular Algorithms In: Technical Report 01-2004 2004 Download Haubelt C. :Design Space Exploration for Distributed Hardware Reconfigurable Systems In: Jürgen Becker, Marco Platzner, and Serge Vernalde (Hrsg.): Field-Programmable Logic and Applications Berlin, Heidelberg Springer 2004 , S. 1171 (Lecture Notes in Computer Science, Bd.3203) Download Haubelt C. , Koch D. , Teich J. Basic OS support for distributed reconfigurable hardware International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'04) (Samos 19. Juli 2004 - 21. Juli 2004 )In: Proceedings of the International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'04) 2004 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=35048878778&origin=inward Download Haubelt C. , Teich J. Modeling and Analysis of Distributed Reconfigurable Hardware Dresdener Arbeitstagung Schaltungs- und Systementwurf (DASS 2004) (Dresden 19. April 2004 - 20. April 2004 )In: Proc Dresdener Arbeitstagung Schaltungs- und Systementwurf (DASS 2004) 2004 Download Koch D. :Preemptive Hardware Task Management International Conference on Field-Programmable Logic and Applications (FPL) (Antwerp 30. August 2004 - 1. September 2004 )In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL) , Berlin, Heidelberg 2004 Download Koch D. , Teich J. Platform-Independent Methodology for Partial Reconfiguration ACM Conference Computing Frountiers (CF 04), (Ischia 14. April 2004 - 16. April 2004 )In: Proceedings of the 2004 ACM conference Computing Frountiers 2004 Download Kupriyanov O. , Hannig F. Teich J. High-speed event-driven RTL compiled simulation International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'04) (Samos 19. Juli 2004 - 21. Juli 2004 )In: Proceedings of the International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'04) 2004 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=35048851603&origin=inward Download Meyer auf der Heide F. , Fischer M. , Krokowski J. , Klein J. , Wanka R. Wand M. :The Randomized Sample Tree: A Data Structure for Externally Stored Virtual Environments Presence-Teleoperators and Virtual Environments Vol. 13, No. 6, The MIT Press 2004 ), S. 617-637 ISSN: 1054-7460 10.1162/1054746043280619 http://www.upb.de/cs/ag-madh/WWW/wanka/pubs/abstracts/VRST02ABS.html Download Mostaghim S. , Teich J. Covering Pareto-optimal fronts by subswarms in multi-objective particle swarm optimization Proceedings of the 2004 Congress on Evolutionary Computation, CEC2004 (Portland, OR 20. Juni 2004 - 23. Juni 2004 )In: Proceedings of the Congress on Evolutionary Computation (CEC '04) 2004 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=4344649636&origin=inward Download Mostaghim S. , Teich J. Multi-Objective Particle Swarm Optimization Dagstuhl Seminar No. 04461 In: Dagstuhl Seminar No. 04461 2004 Download Teich J. Bhattacharyya SS. :Analysis of Dataflow Programs with Interval-Limited Data-Rates Computer Systems: Architectures, Modeling, and Simulation (Samos 19. Juli 2004 - 21. Juli 2004 )In: Computer Systems: Architectures, Modeling, and Simulation , Berlin 2004 Download
2003 Ahmadinia A. , Bobda C. , Danne K. , Teich J. A New Approach for Reconfigurable Massively Parallel Computers IEEE International Conference on Field-Programmable Technology, (Tokyo 15. Dezember 2003 - 17. Dezember 2003 )In: Proceedings of the IEEE International Conference on Field-Programmable Technology 2003 10.1109/FPT.2003.1275784 Download Ahmadinia A. , Bobda C. , Teich J. Temporal Task Clustering for Online Placement on Reconfigurable Hardware IEEE International Conference on Field-Programmable Technology, (Tokyo, Japan, 15. Dezember 2003 - 17. Dezember 2003 )In: Proceedings of the IEEE International Conference on Field-Programmable Technology 2003 Download Ahmadinia A. , Teich J. Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead IFIP International Conference on VLSI-SOC, (Darmstadt 1. Dezember 2003 - 3. Dezember 2003 )In: Proceedings of the IFIP International Conference on VLSI-SOC 2003 Download Bednara M. , Danne K. , Deppe M. , Oberschelp O. , Slomka F. , Teich J. Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware EURASIP J APPL SIG P 2003 ), S. 1-9 ISSN: 1110-8657 10.1155/S1110865703301040 Download Bednara M. , Grabbe C. , J. Shokrollahi J. , Teich J. von zur Gathen J. :A High Performance VLIW Processor for Finite Field Arithmetic International Parallel and Distributed Processing Symposium (IPDPS-2003), (Nice In: Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS-2003) 2003 Download Bhattacharyya SS. , Deprettere E. , Teich J. Domain-Specific Processors: Systems, Architectures, Modeling and Simulation New York Marcel Dekker 2003 Download Bobda Christophe, T. Lehmann, A. Rettberg, M. Zanella:A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems Design, Automation and Test in Europe (DATE 2003), (Munich 3. März 2003 - 7. März 2003 )In: Proceedings of Design, Automation and Test in Europe 2003 10.1109/DATE.2003.1253767 Download Bobda Christophe, K. Danne, H. Kalte:Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), (Las Vegas, Nevada 23. Juni 2003 - 26. Juni 2003 )In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA) 2003 Download Bobda Christophe, K. Danne, H. Kalte:Run-time Exchange of Mechatronic Controllers Using Partial Hardware Reconfiguration International Conference on Field Programmable Logic and Applications (FPL2003), (Lisbon 1. September 2003 - 3. September 2003 )In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2003) 2003 Download Bobda Christophe, K. Danne, Linarth Andre Guilherme:Efficient Implementation of the Singular Value Decomposition on a Reconfigurable System International Conference on Field Programmable Logic and Applications (FPL2003), (Lisbon 1. September 2003 - 3. September 2003 )In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2003) 2003 Download Dellnitz M. , Mostaghim S. , Schütze O. , Teich J. Covering Pareto Sets by Multilevel Evolutionary Subdivision Techniques Second International Conference on Evolutionary Multi-Criterion Optimization (EMO), (Faro In: Proceedings of the Second International Conference on Evolutionary Multi-Criterion Optimization (EMO) 2003 Download Feldmann R. , Haubelt C. , Monien B. , Teich J. Fault tolerance analysis of distributed reconfigurable systems using SAT-based techniques 13th International Conference on Field Programmable Logic and Applications (Lisbon 1. September 2003 - 3. September 2003 )In: Proceedings of 13th International Conference on Field Programmable Logic and Applications 2003 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=35248814417&origin=inward Download Fischer D. , Teich J. Thies M. , Weper R. :Buildabong: A framework for architecture/compiler co-exploration for ASIPs Journal of Circuits Systems and Computers 12 2003 ), S. 353-375 ISSN: 0218-1266 10.1142/S0218126603000799 Download Gerling J. , Mrozynski G. , Schrage J. , Stübbe O. , Teich J. Improved time domain simulation of optical multimode intrasystem interconnects Design, Automation and Test in Europe (DATE 2003), (Munich 3. März 2003 - 7. März 2003 )In: Proceedings of Design, Automation and Test in Europe 2003 10.1109/DATE.2003.1253758 Download Grabbe C. , Bednara M. , Teich J. von zur Gathen J. , J. Shokrollahi J. :FPGA designs of parallel high performance GF(2^233) multipliers Proceedings of the 2003 IEEE International Symposium on Circuits and Systems (Bangkok 25. Mai 2003 - 28. Mai 2003 )In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS-2003) 2003 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=0038790049&origin=inward Download Haubelt C. , Koch D. , Teich J. Basic OS Support for Distributed Reconfigurable Hardware Third International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'03) (Samos 21. Juli 2003 - 23. Juli 2003 )In: Proceedings of the Third International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'03) 2003 Download Haubelt C. , Koch D. , Teich J. ReCoNet: Modeling and implementation of fault tolerant distributed reconfigurable hardware 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003 (São Paulo 8. September 2003 - 11. September 2003 )In: Proceedings of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI2003) 2003 10.1109/SBCCI.2003.1232851 Download Haubelt C. , Mostaghim S. , Slomka F. , Teich J. Tyagi A. :Hierachical Synthesis of Embedded Systems Using Evolutionary Algorithms In: Drechsler, R. and Drechsler, N (Hrsg.): Evolutionary Algorithms in System Design Boston, Dordrecht, London Kluwer Academic Publishers 2003 , S. 63-104 (Genetic Algorithms and Evolutionary Computation (GENA)) Download Haubelt C. , Teich J. Accelerating Design Space Exploration 5th International Conference on ASIC (ASICON 2003) (Beijing 21. Oktober 2003 - 24. Oktober 2003 )In: Proceedings of 5th International Conference on ASIC (ASICON 2003) 2003 Download Haubelt C. , Teich J. Accelerating design space exploration using Pareto-front arithmetics [SoC design] Asia and South Pacific Design Automation Conference, ASP-DAC 2003 (Kitakyushu 21. Januar 2003 - 24. Januar 2003 )In: Proceedings ASP-DAC 2003, Asia and South Pacific Design Automation Conference 2003 10.1109/ASPDAC.2003.1195073 Download Haubelt C. , Teich J. Feldmann R. , Monien B. :SAT-based techniques in system synthesis Design, Automation and Test in Europe Conference and Exhibition, DATE 2003 (Munich 3. März 2003 - 7. März 2003 )In: Proceedings of Design, Automation and Test in Europe (DATE 2003) 2003 10.1109/DATE.2003.1253784 Download Kralicek P. , John W. , Reinhold C. , Teich J. Synthesizing Passive Networks by applying Genetic Programming and Evolution Strategies Congress on Evolutionary Computation (CEC'03), (Canberra 8. Dezember 2003 - 12. Dezember 2003 )In: Proceedings of the Congress on Evolutionary Computation (CEC'03) 2003 10.1109/CEC.2003.1299883 Download Mostaghim S. , Teich J. Strategies for finding good local guides in multi-objective particle swarm optimization Swarm Intelligence Symposium (Indianapolis 24. April 2003 - 26. April 2003 )In: Proceedings of the Swarm Intelligence Symposium 2003 Download Mostaghim S. , Teich J. The role of e-dominance in Multi-Objective Particle Swarm Optimization Methods 2003 Congress on Evolutionary Computation, CEC 2003 (Canberra 8. Dezember 2003 - 12. Dezember 2003 )In: Proceedings of the Congress on Evolutionary Computation (CEC'03) 2003 10.1109/CEC.2003.1299886 Download Teich J. Entwurfsautomatisierung elektronischer Systeme auf Systemebene 11. EIS-Workshop, Entwurf Integrierter Schaltungen und Systeme, (Erlangen In: VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik (GMM), GMM-Fachbericht , Berlin 2003 Download Teich J. Bednara M. :Automatic Synthesis of FPGA Processor Arrays from Loop Algorithms Journal of Supercomputing 2003 ), S. 149-165 ISSN: 0920-8542 10.1023/A:1024447517501 Download Teich J. Haubelt C. , Mostaghim S. , Tyagi A. :Solving hierarchical optimization problems using MOEAs In: Carlos M. Fonseca, Peter J. Fleming, Eckart Zitzler, Kalyanmoy Deb, and Lothar Thiele (Hrsg.): Evolutionary Multi-Criterion Optimization Berlin, Heidelberg, New York Springer 2003 , S. 162-176 (Lecture Notes in Computer Science, Bd.2632) https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=35248891516&origin=inward Download Teich J. Slomka F. :A Model for Buffer Exploration in EDF Scheduled Embedded Systems 11. EIS-Workshop, Entwurf Integrierter Schaltungen und Systeme, (Erlangen In: VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik (GMM), GMM-Fachbericht , Berlin 2003 Download
2002 Bednara M. , Daldrup M. , J. Shokrollahi J. , Teich J. von zur Gathen J. :Tradeoff Analysis of FPGA Based Elliptic Curve Cryptography IEEE International Symposium on Circuits and Systems (ISCAS-02), (Scottsdale, Arizona 26. Mai 2002 - 29. Mai 2002 )In: Proc. of IEEE International Symposium on Circuits and Systems 2002 Download Bednara M. , J. Shokrollahi J. , Teich J. Daldrup M. , von zur Gathen J. :Reconfigurable Implementation of Elliptic Curve Crypto Algorithms 9th Reconfigurable Architectures Workshop, (Fort Lauderdale, Florida In: Proc. The 9th Reconfigurable Architectures Workshop 2002 Download Bednara M. , Teich J. Interface Synthesis for FPGA Based VLSI Processor Arrays The International Conference on Engineering of Reconfigurable Sytsems and Algorithms (ERSA02), (Las Vegas, Nevada 24. Juni 2002 - 27. Juni 2002 )In: Proc. of The International Conference on Engineering of Reconfigurable Sytsems and Algorithms 2002 Download Bonorden O. , Meyer auf der Heide F. , Wanka R. Composition of Efficient Nested BSP Algorithms: Minimum Spanning Tree Computation as an Instructive Example Int. Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA) In: Proceedings of the Int. Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA) 2002 Download Deprettere E. , Teich J. Vassiliadis S. :Embedded Processor Design Challenges In: Embedded Processor Design Challenges Berlin, Germany Springer 2002 (Lecture Notes in Computer Science (LNCS), Bd.Vol. 2268) Download Fischer D. , Teich J. Thies M. , Weper R. :Architecture/Compiler Co-Exploration for ASIPs International Journal of Circuits, Systems and Signal Processing 2002 )ISSN: 1998-4464 Download Fischer D. , Teich J. Thies M. , Weper R. :Efficient Architecture/Compiler Co-Exploration for ASIPs International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES2002), (Grenoble 8. Oktober 2002 - 11. Oktober 2002 )In: ACM SIG Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems 2002 10.1145/581630.581635 Download Hannig F. Teich J. Energy Estimation for Piecewise Regular Processor Arrays Second International Samos Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2002), (Island of Samos 22. Juli 2002 - 25. Juli 2002 )In: Proceedings of the Second International Samos Workshop on Systems, Architectures, Modeling, and Simulation 2002 Download Hannig F. Teich J. Energy Estimation of Nested Loop Programs 14th Annual ACM Symposium on Parallel Algorithms and Architectures (SPAA 2002), (Winnipeg, Manitoba 10. August 2002 - 13. August 2002 )In: Proceedings 14th Annual ACM Symposium on Parallel Algorithms and Architectures 2002 Download Hannig F. Teich J. Bednara M. :Generation of Distributed Loop Control In: E. Deprettere, J. Teich, and S. Vassiliadis (Hrsg.): Embedded Processor Design Challenges, Lecture Notes in Computer Science (LNCS) Berlin, Germany Springer 2002 , S. 154-170 Download Haubelt C. , Teich J. Richter K. , Ernst R. :Flexibility/cost-tradeoffs of platform-based systems In: E. Deprettere, J. Teich, and S. Vassiliadis (Hrsg.): Embedded Processor Design Challenges Springer Verlag 2002 , S. 38-56 (Lecture Notes in Computer Science (LNCS), Bd.2268)ISBN: 9783540433224 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84893789262&origin=inward Download Haubelt C. , Teich J. Richter K. , Ernst R. :Modellierung Rekonfigurierbarer Systemarchitekturen GI / ITG / GMM Workshop - Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Tuebingen Download Haubelt C. , Teich J. Richter K. , Ernst R. :System design for flexibility 2002 Design, Automation and Test in Europe Conference and Exhibition, DATE 2002 (Paris In: Proc. DATE 2002, Design, Automation and Test in Europe 2002 10.1109/DATE.2002.998399 Download Klein J. , Krokowski J. , Wand M. , Fischer M. , Wanka R. Meyer auf der Heide F. :The randomized sample tree: A data structure for interactive walkthroughs in externally stored virtual environments Proceedings of the ACM Symposium on Virtual Reality Software and Technology (VRST) (Hong Kong In: Sun H.; Peng Q. (Hrsg.): Proc. ACM Symp. on Virtual Reality Software and Technology (VRST) 2002 10.1145/585740.585764 Download Mostaghim S. , Teich J. Tyagi A. :Comparison of data structures for storing Pareto-sets in MOEAs 2002 Congress on Evolutionary Computation, CEC 2002 (Honolulu, HI 10.1109/CEC.2002.1007035 Download Köster M., Teich J.:(Self-)reconfigurable finite state machines: Theory and implementation 2002 Design, Automation and Test in Europe Conference and Exhibition, DATE 2002 (Paris In: Proc. DATE 2002, Design, Automation and Test in Europe 2002 10.1109/DATE.2002.998356 Download Teich J. Ernst R. , Richter K. , Thiele L. , Ziegenbein D. :SPI - A System Model for Heterogeneously Specified Embedded Systems IEEE Transactions on Very Large Scale Integration (Vlsi) Systems 10 2002 ), S. 379-389 ISSN: 1063-8210 10.1109/TVLSI.2002.807767 Download Teich J. Thiele L. :Exact Partitioning of Affine Dependence Algorithms In: Embedded Processor Design Challenges, Lecture Notes in Computer Science (LNCS) Berlin, Germany Springer 2002 , S. 135-151 Download Wanka R. Any load-balancing regimen for evolving tree computations on circulant graphs is asymptotically optimal 28th International Workshop on Graph-Theoretic Concepts in Computer Science (WG) (Cesky Krumlov In: Proc. 28th International Workshop on Graph-Theoretic Concepts in Computer Science (WG) 2002 10.1007/3-540-36379-3_36 Download
2001 Anlauff M. , Fischer D. , Kutter P. , Teich J. Weper R. :Hierarchical Microprocessor Design Using XASM EUROCAST 2001 (Las Palmas de Gran Canaria 19. Februar 2001 - 23. Februar 2001 )In: Proc. EUROCAST 2001 2001 Download Bednara M. , Beyer O. , Teich J. Wanka R. Hardware Supported Sorting: Design and Tradeoff Analysis In: In System Design Automation Kluwer Academic Publishers 2001 , S. 97-107 Download Bednara M. , Hannig F. Teich J. Boundary control: A new distributed control architecture for space-time transformed (VLSI) processor arrays 35th Asilomar Conference on Signals, Systems and Computers (Pacific Grove, CA In: Matthews M.B. (Hrsg.): Proc. 35th IEEE Asilomar Conf. on Signals, Systems and Computers 2001 https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=0035573058&origin=inward Download Bhattacharyya SS. , Teich J. Zitzler E. , Bambha N. :Hybrid Global/Local Search Strategies for Dynamic Voltage Scaling in Embedded Multiprocessors 9th Int. Workshop on Hardware/Software Co-Design, (Copenhagen 25. April 2001 - 27. April 2001 )In: Proc. 9th Int. Workshop on Hardware/Software Co-Design 2001 Download Cieslok F. , Esau H. , Teich J. EXPLORA- generic design space exploration during embedded system synthesis Springer New York LLC 2001 ISBN: 9781475745351 10.1007/978-0-387-35409-5_21 Download Ernst R. , Griess M. , Strehl K. , Teich J. Thiele L. , Ziegenbein D. :FunState - An Internal Design Representation for Codesign IEEE Transactions on Very Large Scale Integration (Vlsi) Systems 2001 ), S. 524-544 ISSN: 1063-8210 10.1109/92.931229 Download Fekete SP. , Köhler E. , Teich J. Extending Partial Suborders In: Hajo Broersma, Ulrich Faigle, Johann Hurink and Stefan Pickl (Hrsg.): Electronic Notes in Discrete Mathematics Elsevier BV 2001 Download Fekete SP. , Köhler E. , Teich J. Higher-Dimensional Packing with Order Constraints 7th Workshop on Algorithms and Data Structures, In: Proc. 7th Workshop on Algorithms and Data Structures, Lecture Notes in Computer Science (LNCS), Vol. 2125 2001 Download Fekete SP. , Köhler E. , Teich J. Optimal FPGA Module Placement with Temporal Precedence Constraints DATE 2001, Design, Automation and Test in Europe, (Munich 13. März 2001 - 16. März 2001 )In: Proc. DATE 2001, Design, Automation and Test in Europe 2001 10.1109/DATE.2001.915093 Download Fekete SP. , Schepers J. , Teich J. Optimization of Dynamic Hardware Reconfigurations Journal of Supercomputing 2001 ), S. 57-75 ISSN: 0920-8542 10.1023/A:1011188411132 Download Fischer D. , Kastens U. , Teich J. Thies M. , Weper R. :Design Space Characterization for Architecture/Compiler Co-Exploration International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2001), (Atlanta, Georgia In: ACM SIG Proceedings International Conference on Compilers, Architectures and Synthesis for Embedded Systems 2001 Download Fischer D. , Teich J. Weper R. :Hierarchical Modeling and Simulation of Embedded Processors Using ASMs nternational Workshop on Software and Compilers for Embedded Systems, (SCOPES 2001), (St.Goar 20. März 2001 - 22. März 2001 )In: International Workshop on Software and Compilers for Embedded Systems 2001 Download Hannig F. Teich J. Design Space Exploration for Massively Parallel Processor Arrays Sixth International Conference on Parallel Computing Technologies (PaCT-2001) (Novosibirsk 3. September 2001 - 7. September 2001 )In: Proc. of the Sixth International Conference on Parallel Computing Technologies (PaCT-2001) 2001 Download Meyer auf der Heide F. , Wanka R. Parallel Bridging Models and Their Impact on Algorithm Design Int. Conf. on Computational Science (ICCS) 2001 In: Proceedings of the Int. Conf. on Computational Science (ICCS) 2001 Download Teich J. Exact Partitioning of Affine Dependence Algorithms SAMOS - Systems, Architectures, Modeling and Simulation Workshop, (Island of Samos In: Proc. SAMOS - Systems, Architectures, Modeling and Simulation Workshop 2001 Download Teich J. Pareto-Front Exploration with Uncertain Objectives First International Conference on Evolutionary Multi-Criterion Optimization, (Zurich 7. März 2001 - 9. März 2001 )In: Proc. First International Conference on Evolutionary Multi-Criterion Optimization, In Lecture Notes in Computer Science (LNCS), Vol. 1993 2001 Download Teich J. Symbiose von Hardware und Software In: K. J. Buchenrieder (Hrsg.): Hardware/Software Codesign Bruchsal IT Press 2001 , S. 79-107 (Informationsverarbeitung und Technische Informatik) Download Teich J. Synthesis and Optimization of Digital Hardware/Software Systems In: R. Merker and W. Schwarz (Hrsg.): In System Design Automation Kluwer Academic Publishers 2001 , S. 3-26 Download Teich J. Bednara M. :Synthesis of FPGA Implementations from Loop Algorithms First International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA01), (Las Vegas, Nevada 25. Juni 2001 - 28. Juni 2001 )In: Proc. of the First International Conference on Engineering of Reconfigurable Systems and Algorithms 2001 Download
2000 Bednara M. , Beyer O. , Teich J. Wanka R. Hardware-Supported Sorting: Design and Tradeoff Analysis Workshop on System Design Automation - SDA 2000 (Rathen In: Workshop on System Design Automation - SDA 2000 2000 Download Bednara M. , Beyer O. , Teich J. Wanka R. Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter Int. Conf. on Application Specific Systems, Architectures, and Processors, pp. 299-308, Boston, MA, U.S.A. IEEE Computer Society Press, July 2000Proc. ASAP'00, the Int. Conf. on Application Specific Systems, Architectures, and Processors, (Boston, MA 10. Juli 2000 - 12. Juli 2000 )In: Proc. ASAP'00, the Int. Conf. on Application Specific Systems, Architectures, and Processors, pp. 299-308, Boston, MA, U.S.A. IEEE Computer Society Press, July 2000Proc. ASAP'00, the Int. Conf. on Application Specific Systems, Architectures, and Processors 2000 Download Bednara M. , Hardt W. , Rettberg A. , Teich J. Automated Design Space Exploration on System Level for Embedded Systems Ninth Annual International HDL Conference and Exhibition (HDL Conf. 2000), (San Jose, CA In: Proc. Ninth Annual International HDL Conference and Exhibition 2000 Download Bhattacharyya SS. , Teich J. Zitzler E. :Evolutionary Algorithms for the Synthesis of Embedded Software IEEE Transactions on Very Large Scale Integration (Vlsi) Systems 8 2000 ), S. 452-456 ISSN: 1063-8210 10.1109/92.863627 Download Bhattacharyya SS. , Teich J. Zitzler E. :Multidimensional Exploration of Software Implementations for DSP Algorithms Journal of VLSI Signal Processing 2000 ), S. 83-98 ISSN: 0922-5773 10.1023/A:1008170728742 Download Bhattacharyya SS. , Teich J. Zitzler E. :Optimizing the Efficiency of Parameterized Local Search within Global Search Int. Conf. on Evolutionary Computation, (La Jolla, CA In: Proc. of CEC'2000, the Int. Conf. on Evolutionary Computation 2000 Download Böke C. , Ditze C. , Hardt W. , Kleinjohann B. , Rammig F. , Rettberg A. , Stroop J. , Teich J. P-based System Design with the PARADISE Design Environment EUROMICRO Journal 2000 )ISSN: 0167-3858 Download Cieslok F. , Ernst R. , Jersak M. , Richter K. , Strehl K. , Teich J. Thiele L. , Wolf F. , Ziegenbein D. :Embedded System Design using the SPI Workbench Forum on Design Languages 2000, (Tübingen In: Proc. FDL'00 2000 Download Cieslok F. , Esau H. , Teich J. EXPLORA - Generic Design Space Exploration During Embedded System Synthesis Int. IFIP Workshop on Distributed and Parallel Embedded Systems, (Schloss Eringerfeld In: Proc. DIPES 2000, Int. IFIP Workshop on Distributed and Parallel Embedded Systems 2000 Download Ernst R. , Richter K. , Teich J. Ziegenbein D. :SPI Workbench - Entwurf gemischt reaktiv/transformativer Systeme Workshop Architekturentwurf für eingebettete Systeme, (Karlsruhe In: AES 2000, Workshop Architekturentwurf für eingebettete Systeme 2000 Download Fischer D. , Teich J. Trinkert S. , Weper R. :A Joined Architecture/Compiler Environment for ASIPs International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2000), (San Jose, CA 17. November 2000 - 18. November 2000 )In: ACM SIG Proc. International Conference on Compilers, Architectures and Synthesis for Embedded Systems 2000 Download Fischer D. , Teich J. Trinkert S. , Weper R. :BUILDABONG: A Rapid Prototyping Environment for ASIPs DSP-Deutschland 2000, (Munich In: Proc. DSP-Deutschland 2000 2000 Download Wolfram Hardt, Franz Rammig, Carsten Böke, Joachim Stroop, Achim Rettberg, Del Castillo, Bernd Kleinjohann, Jürgen Teich:IP-based System Design within the PARADISE Design Environment Journal of Systems Architecture 2000 )ISSN: 1383-7621 Download Kutter P. , Teich J. Weper R. :Description and Simulation of Microprocessor Instruction Sets Using ASMs International Workshop on Abstract State Machines (, 19. März 2000 - 24. März 2000 )In: Lecture Notes in Computer Science (LNCS) 1912 2000 10.1007/3-540-44518-8_15 Download Kutylowski M. , Lorys K. , Oesterdiekhoff B. , Wanka R. Periodification scheme: Constructing sorting networks with constant period Journal of the Acm 47 2000 ), S. 944-967 ISSN: 0004-5411 10.1145/355483.355490 Download Strehl K. , Teich J. Thiele L. :Regular State Machines Parallel Algorithms and Applications 2000 ), S. 265-300 ISSN: 1063-7192 Download Teich J. Symbiose von Hardware und Software In: ForschungsForum 2000 2000 , S. 82-87 Download
1999 Bhattacharyya SS. , Teich J. Zitzler E. :3D Exploration of Software Schedules for DSP Algorithms 7th Int. Workshop on Hardware/Software Co-Design, (Rome 3. Mai 1999 - 5. Mai 1999 )In: Proc. CODES'99, the 7th Int. Workshop on Hardware/Software Co-Design 1999 Download Bhattacharyya SS. , Teich J. Zitzler E. :Evolutionary Algorithm Based Exploration of Software Schedules for Digital Signal Processors Genetic and Evolutionary Computation Conference, (Orlando, Florida In: Proc. GECCO'99, the Genetic and Evolutionary Computation Conference 1999 Download Bhattacharyya SS. , Teich J. Zitzler E. :Optimized Software Synthesis for DSP Using Randomization Techniques In: Technical Report No. 75 1999 Download Ernst R. , Richter K. , Teich J. Thiele L. , Ziegenbein D. :Hardware/Software Codesign of Embedded Systems - The SPI Workbench Int. Workshop on VLSI, (Orlando, Florida In: Proc. Int. Workshop on VLSI 1999 Download Ernst R. , Richter K. , Teich J. Thiele L. , Ziegenbein D. :Representation of Function Variants for Embedded System Optimization and Synthesis 36th Design Automation Conference (DAC), (New Orleans 21. Juni 1999 - 25. Juni 1999 )In: Proc. 36th Design Automation Conference 1999 Download Ernst R. , Richter K. , Teich J. Thiele L. , Ziegenbein D. :SPI - An Internal Representation for Heterogeneously Specified Embedded Systems GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, (Braunschweig In: Proc. GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen 1999 Download Ernst R. , Strehl K. , Teich J. Thiele L. , Ziegenbein D. :FunState - An Internal Design Representation for Codesign IEEE/ACM Int. Conf. on Computer-Aided Design, (San Jose, CA 7. November 1999 - 11. November 1999 )In: Proc. ICCAD'99, the IEEE/ACM Int. Conf. on Computer-Aided Design 1999 Download Ernst R. , Strehl K. , Teich J. Thiele L. , Ziegenbein D. :Scheduling Hardware/Software Systems Using Symbolic Techniques 7th Int. Workshop on Hardware/Software Co-Design, (Rome 3. Mai 1999 - 5. Mai 1999 )In: Proc. CODES'99, the 7th Int. Workshop on Hardware/Software Co-Design 1999 Download Fekete SP. , Schepers J. , Teich J. Compile-Time Optimization of Dynamic Hardware Reconfigurations Int. Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA'99), (Las Vegas, Nevada In: Proc. Int. Conf. on Parallel and Distributed Processing Techniques and Applications 1999 Download
1998 Bhattacharyya S. , Teich J. Zitzler E. :Buffer Memory Optimization in DSP Applications - An Evolutionary Approach Parallel Problem Solving from Nature (PPSN'98) (Amsterdam In: Springer Lecture Notes in Computer Science (LNCS) 1498 1998 Download Bhattacharyya S. , Teich J. Zitzler E. :Optimized Software Synthesis for Digital Processing Algorithms - An Evolutionary Approach In: Technical Report No. 32, Computer Engineering and Communication Networks Lab (TIK) 1998 Download Bhattacharyya S. , Teich J. Zitzler E. :Optimized Software Synthesis for Digital Signal Processing Algorithms: An Evolutionary Approach Workshop on Signal Processing Systems (SiPS), (Boston 8. Oktober 1998 - 10. Oktober 1998 )In: Proc. of the 1998 Workshop on Signal Processing Systems 1998 Download Bhattacharyya SS. , Teich J. Zitzler E. :Buffer Memory Optimization in DSP Applications - An Evolutionary Approach In: Parallel Problem Solving from Nature (PPSN'98) Amsterdam, The Netherlands Springer-verlag 1998 , S. 292-301 ISBN: 3540650784 Download Blickle T. , Teich J. Thiele L. :System-Level Synthesis Using Evolutionary Algorithms Design Automation For Embedded Systems 3 1998 ), S. 23-58 ISSN: 0929-5585 Download Eisenring M. , Teich J. Domain-Specific Interface Generation From Dataflow Specifications 6th Int. Workshop on Hardware/Software Co-design, (Seattle, Washington 15. März 1998 - 18. März 1998 )In: Proc. of Codes/CASHE'98, the 6th Int. Workshop on Hardware/Software Co-design 1998 Download Eisenring M. , Teich J. Interfacing Hardware and Software Proc. of FPL'98, the Conf. on Field-Programmable Logic and Applications (Tallin In: Proc. of FPL'98, the Conf. on Field-Programmable Logic and Applications, Tallin, Estonia, Springer Lecture Notes in Computer Science (LNCS) 1482 1998 Download Eisenring M. , Teich J. Thiele L. :Rapid Prototyping of Dataflow Programs on Hardware/Software Architectures Hawai'i Int. Conf. on Syst. Sci., (Kona, Hawaii 6. Januar 1998 - 9. Januar 1998 )In: Proc. of HICSS'98, the Hawai'i Int. Conf. on Syst. Sci. 1998 Download Ernst R. , Richter K. , Teich J. Thiele L. , Ziegenbein D. :Combining Multiple Models of Computation for Scheduling and Allocation Codes/CASHE\'98, the 6th Int. Workshop on Hardware/Software Codesign (Seattle, Washington In: Proc. of Codes/CASHE\'98, the 6th Int. Workshop on Hardware/Software Codesign 1998 Download Ernst R. , Richter K. , Teich J. Thiele L. , Ziegenbein D. :Representation of Process Mode Correlation for Scheduling ICCAD - the ACM/IEEE Int. Conf. on CAD (San Jose, CA 8. November 1998 - 12. November 1998 )In: Proc. of ICCAD - the ACM/IEEE Int. Conf. on CAD 1998 Download Esser R. , Teich J. Thiele L. :CodeSign: An Embedded System Design Environment IEE Proceedings E: Computers and Digital Techniques 145 1998 ), S. 171-180 ISSN: 0143-7062 Download Naedele M. , Strehl K. , Teich J. Thiele L. , Ziegenbein D. :SCF - State Machine Controlled Flow Diagrams In: Swiss Federal Institute of Technology (ETH) Zurich (Hrsg.): Technical Report No. 32, Computer Engineering and Communication Networks Lab (TIK) 1998 Download Rabani Y. , Sinclair A. , Wanka R. Local Divergence of Markov Chains and the Analysis of Iterative Load-Balancing Schemes IEEE Symposium on Foundations of Computer Science (FOCS) (San Francisco, USA In: Proc. 39th IEEE Symposium on Foundations of Computer Science (FOCS) 1998 10.1109/SFCS.1998.743520 Download Teich J. Fekete S. , Schepers J. :Optimizing Dynamic Hardware Reconfigurations 1998 )Download Teich J. Thiele L. :Regular State Machines Workshop Seminar No. 98341, Tiling for Optimal Resource Utilization, Schloss Dagstuhl (Schloss Dagstuhl In: Presented at Workshop Seminar No. 98341, Tiling for Optimal Resource Utilization 1998 Download Teich J. Zitzler E. :3D Exploration of Uniprocessor Schedules for DSP Algorithms 1998 )Download
1997 Blickle T. , Teich J. Thiele L. :An Evolutionary Approach to System-Level Synthesis Codes/CASHE'97, the 5th Int. Workshop on Hardware/Software Co-design (Braunschweig In: Proc. of Codes/CASHE'97, the 5th Int. Workshop on Hardware/Software Co-design, Braunschweig, Germany, pp. 167-171, March 1997 1997 Download Brockmann K. , Wanka R. Efficient Oblivious Parallel Sorting on the MasPar MP-1 30th Hawaii International Conference on System Sciences (HICSS) (Hawaii In: Proc of 30th Hawaii International Conference on System Sciences (HICSS) 1997 Download Fortes J. , Noll T. , Taylor V. , Teich J. Thiele L. , Vissers K. (Hrsg.):Proc. IEEE Int. Conference on Application Specific Systems, Architectures, and Processors (ASAP´97) 1997 Download Kutylowski M. , Wanka R. Playing Tetris on Meshes and Multi-Dimensional SHEARSORT 8th International Symposium on Algorithms and Computation (ISAAC) In: In Proc. of 8th International Symposium on Algorithms and Computation (ISAAC) 1997 Download Martin M. , Sriram S. , Teich J. Thiele L. :Performance Analysis of Mixed Asynchronous-Synchronous Systems IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 16 1997 ), S. 473-484 ISSN: 0278-0070 Download Teich J. Digitale Hardware/Software-Systeme: Synthese und Optimierung Springer 1997 Download Teich J. Hardware/Software-Codesign: Massgeschneiderte elektronische Systeme. Teil II: HW/SW-Synthese Bulletin SEV/VSE 1997 ), S. 17-22 Download Teich J. Thiele L. , Zhang L. :Partitioning Processor Arrays under Resource Constraints Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 17 1997 ), S. 5-20 ISSN: 1387-5485 Download Wachsmann A. , Wanka R. Sorting on a massively parallel system using a library of basic primitives: Modeling and experimental results 3rd International Conference on Parallel Processing (Euro-Par) (Passau In: Proc 3rd International Conference on Parallel Processing (Euro-Par) 1997 10.1007/BFb0002763 Download Wanka R. Meyer auf der Heide F. , Storch M. :Optimal tradeoffs between size and slowdown for universal parallel networks Theory of Computing Systems 30 1997 ), S. 627-644 ISSN: 1432-4350 10.1007/s002240000071 Download
1996 Teich J. Hardware/Software-Codesign: Massgeschneiderte elektronische Systeme.Teil I: HW/SW-Architekturen und Spezifikation Bulletin SEV/VSE 1996 ), S. 17-23 Download Teich J. Synthesis and Optimization of Digital Hardware/Software Systems 1996 )Download Teich J. Blickle T. , Thiele L. :An evolutionary approach to system-level synthesis 1st Online Workshop on Soft Computing (Nagoya, Japan In: Proc. of WSC1, the 1st Online Workshop on Soft Computing 1996 Download Teich J. Thiele L. :A new approach to solving resource-constrained scheduling problems based on a flow-model In: Swiss Federal Institute of Technology (ETH) Zurich (Hrsg.): Technical Report No. 17, Computer Engineering and Communication Networks Lab (TIK) 1996 Download Teich J. Thiele L. :System-level synthesis using evolutionary algorithms 1996 )Download Teich J. Thiele L. , Zhang L. :Scheduling of partitioned regular algorithms on processor arrays with constrained resources Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP´96), (Chicago, U.S.A., 19. August 1996 - 21. August 1996 )In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP´96)Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP´96)Int. Conf. on Application-Specific Systems, Architectures, and Processors 1996 Download Meyer auf der Heide F, Oesterdiekhoff B, Wanka R:Strongly Adaptive Token Distribution Algorithmica 15 1996 ), S. 413-427 ISSN: 0178-4617 10.1007/BF01955042 Download
1994 Evans BL. , Kalker TA. , Teich J. Families of Smith Form Decompositions to simplify Multidimensional Filter Design IEEE Asilomar Conf. on Signals, Systems and Computers, (Pacific Grove, CA, U.S.A., In: Proc. IEEE Asilomar Conf. on Signals, Systems and Computers 1994 Download Evans BL. , Schwarz C. , Teich J. Automateddesign of two-dimensional rational decimation systems IEEE Asilomar Conf. on Signals, Systems and Computers, (Pacific Grove, CA, U.S.A., In: Proc. IEEE Asilomar Conf. on Signals, Systems and Computers 1994 Download Evans BL. , Schwarz C. , Teich J. Welzl E. :On finding a minimal enclosing parallelogram 4th MSI Workshop on Computational Geometry, (Cornell University, Ithaca, NY, U.S.A., In: ICSI - International Computer Science Institute, Berkeley (Hrsg.): 4th MSI Workshop on Computational Geometry 1994 Download Kutylowski M. , Lorys K. , Oesterdiekhoff B. , Wanka R. Fast and Feasible Periodic Sorting Networks of Constant Depth 35th IEEE Symposium on Foundations of Computer Science (FOCS) In: Proceedings of the 35th IEEE Symposium on Foundations of Computer Science (FOCS) 1994 Download Martin M. , Sriram S. , Teich J. Thiele L. :Performance analysis and optimization of mixed asynchronous synchronous systems 1994 )Download Martin M. , Sriram S. , Teich J. Thiele L. :Performance Analysis of Mixed Asynchronous-Synchronous Systems EEE Int. Workshop on VLSI Signal Processing 94 (, 26. Oktober 1994 - 28. Oktober 1994 )In: Proc. of the IEEE Int. Workshop on VLSI Signal Processing 94 1994 Download
1992 Arzt U. , Teich J. Schumacher M. , Thiele L. :Hierarchical concepts in the design of processor arrays CompEuro 1992, (The Hague, The Netherlands, 4. Mai 1992 - 8. Mai 1992 )In: Proc. CompEuro 1992 1992 10.1109/CMPEUR.1992.218504 Download Arzt U. , Teich J. Thiele L. :The concepts of COMPAR: A compiler for massive parallel architectures International Symposium on Circuits and Systems (ISCAS´92), (San Diego, CA, U.S.A., In: Proc. International Symposium on Circuits and Systems 1992 Download Teich J. Thiele L. :A transformative approach to the partitioning of processor arrays Int. Conf. on Application Specific Array Processors (ASAP´92), (Berkeley, CA, U.S.A., In: Proc. Int. Conf. on Application Specific Array Processors 1992 Download Teich J. Thiele L. :Control generation in the design of processor array In: Parallel Processing on VLSI Arrays Kluwer Academic Publishers 1992 Download
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