HIPAcc
Eine domänenspezifische Sprache mit GPU Zielcodegenerierung für Bildverarbeitungsanwendungen
HIPAcc erlaubt es Bildverarbeitungsalgorithmen in einer domänenspezifischen Sprache (engl. domain-specific language (DSL)) zu beschreiben. Ausgehend von dieser Beschreibung wird mit Hilfe von Source-to-Source übersetzung Zielcode für Graphikkartenbeschleuniger generiert. Das Framework bietet Backends für CUDA, OpenCL und Renderscript. HIPAcc ist unter der Simplified BSD License lizenziert (Open Source) und läuft aktuell unter GNU/Linux und Mac OS X
Publikationen
- Qiao B., Özkan MA., Teich J., Hannig F.:
The Best of Both Worlds: Combining CUDA Graph with an Image Processing DSL
57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. Juli 2020 - 23. Juli 2020)
In: Proceedings of the 57th Annual Design Automation Conference (DAC) 2020
DOI: 10.1109/DAC18072.2020.9218531
BibTeX: Download - Qiao B., Reiche O., Teich J., Hannig F.:
Unveiling Kernel Concurrency in Multiresolution Filters on GPUs with an Image Processing DSL
13th Workshop on General Purpose Processing Using GPU (GPGPU) (San Diego, CA, USA, 23. Februar 2020 - 23. Februar 2020)
In: Proceedings of the 13th Workshop on General Purpose Processing Using GPU (GPGPU) 2020
DOI: 10.1145/3366428.3380773
BibTeX: Download - Qiao B., Reiche O., Hannig F., Teich J.:
From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization
2019 International Symposium on Code Generation and Optimization (CGO) (Washington, DC, USA, 16. Februar 2019 - 20. Februar 2019)
In: Proceedings of the 2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO) 2019
DOI: 10.1109/CGO.2019.8661176
BibTeX: Download - Membarth R., Reiche O., Hannig F., Teich J., Körner M., Eckert W.:
HIPAcc: A Domain-Specific Language and Compiler for Image Processing
In: IEEE Transactions on Parallel and Distributed Systems 27 (2016), S. 210-224
ISSN: 1045-9219
DOI: 10.1109/TPDS.2015.2394802
BibTeX: Download - Reiche O., Özkan MA., Membarth R., Teich J., Hannig F.:
Generating FPGA-based Image Processing Accelerators with Hipacc
International Conference on Computer Aided Design (ICCAD) (Irvine, 13. November 2017 - 16. November 2017)
In: Proceedings of the International Conference on Computer Aided Design (ICCAD) 2017
DOI: 10.1109/ICCAD.2017.8203894
BibTeX: Download - Reiche O., Özkan MA., Hannig F., Teich J., Schmid M.:
Loop Parallelization Techniques for FPGA Accelerator Synthesis
In: Journal of Signal Processing Systems 90 (2018), S. 3-27
ISSN: 1939-8115
DOI: 10.1007/s11265-017-1229-7
BibTeX: Download - Qiao B., Reiche O., Hannig F., Teich J.:
Automatic Kernel Fusion for Image Processing DSLs
21st International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar, 28. Mai 2018 - 30. Mai 2018)
In: Proceedings of the 21th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2018
DOI: 10.1145/3207719.3207723
BibTeX: Download - Özkan MA., Reiche O., Hannig F., Teich J.:
A Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis
Fourth International Workshop on FPGAs for Software Programmers (FSP) (Ghent, 7. September 2017)
In: Proceedings of the Fourth International Workshop on FPGAs for Software Programmers (FSP) 2017
URL: https://ieeexplore.ieee.org/document/8084549
BibTeX: Download - Reiche O., Kobylko C., Hannig F., Teich J.:
Auto-vectorization for Image Processing DSLs
18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES) (Barcelona, 21. Juni 2017 - 22. Juni 2017)
In: Proceedings of the 18th International Conference on Languages, Compilers, Tools, and Theory for Embedded Systems (LCTES) 2017
DOI: 10.1145/3078633.3081039
BibTeX: Download - Fickenscher J., Hannig F., Teich J.:
DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs
ARCS 2019 - 32nd International Conference on Architecture of Computing Systems (Copenhagen, 20. Mai 2019 - 23. Mai 2019)
In: Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck (Hrsg.): Proceedings of the 32nd International Conference on Architecture of Computing Systems (ARCS) 2019
DOI: 10.1007/978-3-030-18656-2
BibTeX: Download - Schmid M., Reiche O., Hannig F., Teich J.:
HIPAcc
In: Dirk Koch, Frank Hannig, and Daniel Ziener (Hrsg.): FPGAs for Software Programmers, Springer, 2016
DOI: 10.1007/978-3-319-26408-0_12
BibTeX: Download - Özkan MA., Reiche O., Qiao B., Membarth R., Teich J., Hannig F.:
Synthesizing High-Performance Image Processing Applications with Hipacc
Demo at the University Booth at Design, Automation and Test in Europe (DATE) (Florence, 25. März 2019 - 29. März 2019)
URL: https://www12.cs.fau.de/downloads/oezkan/publications/date-ubooth19.pdf
BibTeX: Download - Membarth R., Dutta H., Hannig F., Teich J.:
Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards
In: Transactions on High-Performance Embedded Architectures and Compilers V, Springer, 2019, S. 1-20 (Lecture Notes in Computer Science (LNCS), Bd.11225)
ISBN: 978-3-662-58833-8
DOI: 10.1007/978-3-662-58834-5_1
BibTeX: Download - Fey D., Hannig F.:
Special Issue on Heterogeneous Real-Time Image Processing
In: Journal of Real-Time Image Processing 14 (2018), S. 513-515
ISSN: 1861-8200
DOI: 10.1007/s11554-018-0763-2
BibTeX: Download - Hannig F.:
Domain-specific and Resource-aware Computing (Habilitationsschrift, 2017)
DOI: 10.13140/RG.2.2.23418.13761
BibTeX: Download - Özkan MA., Reiche O., Hannig F., Teich J.:
FPGA-Based Accelerator Design from a Domain-Specific Language
26th International Conference on Field-Programmable Logic and Applications (FPL) (Lausanne, 29. August 2016 - 2. September 2016)
In: Proceedings of the 26th International Conference on Field-Programmable Logic and Applications (FPL) 2016
DOI: 10.1109/FPL.2016.7577357
BibTeX: Download - Häublein K., Reichenbach M., Reiche O., Özkan MA., Fey D., Hannig F., Teich J.:
Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures
16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos, 18. Juni 2016 - 21. Juni 2016)
In: Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2016
DOI: 10.1109/SAMOS.2016.7818350
BibTeX: Download - Koch D., Hannig F., Ziener D. (Hrsg.):
FPGAs for Software Programmers
Berlin; Heidelberg: 2016
ISBN: 978-3-319-26406-6
DOI: 10.1007/978-3-319-26408-0
BibTeX: Download - Hannig F.:
A Quick Tour of High-Level Synthesis Solutions for FPGAs
In: Dirk Koch, Frank Hannig, and Daniel Ziener (Hrsg.): FPGAs for Software Programmers, Springer, 2016
DOI: 10.1007/978-3-319-26408-0_3
BibTeX: Download - Reiche O., Häublein K., Reichenbach M., Hannig F., Teich J., Fey D.:
Automatic Optimization of Hardware Accelerators for Image Processing
DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (Grenoble, 13. März 2015 - 13. März 2015)
In: Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) 2015
URL: http://arxiv.org/abs/1502.07448
BibTeX: Download - Hannig F., Fey D., Lokhmotov A. (Hrsg.):
Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015)
2015
Open Access: http://arxiv.org/abs/1502.07241
URL: http://arxiv.org/abs/1502.07241
BibTeX: Download - Membarth R., Reiche O., Schmitt C., Hannig F., Teich J., Stürmer M., Köstler H.:
Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language
In: Journal of Parallel and Distributed Computing 74 (2014), S. 3191-3201
ISSN: 0743-7315
DOI: 10.1016/j.jpdc.2014.08.008
BibTeX: Download - Reiche O., Schmid M., Hannig F., Membarth R., Teich J.:
Code Generation from a Domain-specific Language for C-based HLS of Hardware Accelerators
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (New Dehli, 12. Oktober 2014 - 17. Oktober 2014)
In: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), New York, NY, USA: 2014
DOI: 10.1145/2656075.2656081
BibTeX: Download - Membarth R., Reiche O., Hannig F., Teich J.:
Code Generation for Embedded Heterogeneous Architectures on Android
Conference on Design, Automation and Test in Europe (DATE) (Dresden, 24. März 2014 - 28. März 2014)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE) 2014
DOI: 10.7873/DATE2014.099
BibTeX: Download - Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Mastering Software Variant Explosion for GPU Accelerators
In: Proceedings of the 10th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar), Berlin; Heidelberg: Springer, 2012, S. 123-132 (Lecture Notes on Computer Science (LNCS))
DOI: 10.1007/978-3-642-36949-0_15
BibTeX: Download - Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Automatic Optimization of In-Flight Memory Transactions for GPU Accelerators based on a Domain-Specific Language for Medical Imaging
11th International Symposium on Parallel and Distributed Computing (ISPDC) (Munich, 25. Juni 2012 - 29. Juni 2012)
In: Proc. of the 11th International Symposium on Parallel and Distributed Computing (ISPDC), New York, NY, USA: 2012
DOI: 10.1109/ISPDC.2012.36
BibTeX: Download - Membarth R., Hannig F., Teich J., Körner M., Eckert W.:
Generating Device-specific GPU Code for Local Operators in Medical Imaging
26th IEEE International Parallel and Distributed Processing Symposium (IPDPS) (Shanghai, 21. Mai 2012 - 25. Mai 2012)
In: Proc. of the 26th IEEE International Parallel and Distributed Processing Symposium (IPDPS), New York, NY, USA: 2012
DOI: 10.1109/IPDPS.2012.59
BibTeX: Download - Qiao B., Teich J., Hannig F.:
An Efficient Approach for Image Border Handling on GPUs via Iteration Space Partitioning
2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) (Portland, OR, 17. Mai 2021 - 21. Mai 2021)
In: Proceedings of the 2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) 2021
DOI: 10.1109/IPDPSW52791.2021.00067
BibTeX: Download