Simulative Entwurfsraumexploration (C02) › Lehrstuhl für Informatik 12

Overview of the design space exploration

Erforscht wird die systematische Co-Exploration von optimalen Architekturkonfigurationen und passenden invasiven Strategien für eine gegebene Menge ressourcengewahrer Anwendungen. Die Forschungsschwerpunkte beinhalten: (a) Techniken zur Entwurfsraumexploration basierend auf (semi-)simulativen und statistischen Methoden, (b) Klassifikation invasiver Anwendungen in parallele Berechnungsmuster, (c) Anwendungsmodellierung durch sogenannte dynamische Invasionsgraphen und (d) modellbasierte Auto-Tuning-Techniken, um bestmögliche Anpassungen an variierende Ressourcenzuweisungen zu finden.

URL: http://invasic.informatik.uni-erlangen.de/en/tp_c2_PhII.php

Publikationen

Hannig F., Herkersdorf A.:
Introduction to the Special Issue on Testing, Prototyping, and Debugging of Multi-Core Architectures
In: Journal of Systems Architecture 61 (2015), S. 600
ISSN: 1383-7621
DOI: 10.1016/j.sysarc.2015.11.003
BibTeX: Download
Roloff S., Hannig F., Teich J.:
High Performance Network-on-Chip Simulation by Interval-based Timing Predictions
15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia) (Seoul, Republic of Korea, 10/15/17 - 10/20/17)
DOI: 10.1145/3139315.3139320
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Witterauf M., Hannig F., Teich J.:
Constructing Fast and Cycle-Accurate Simulators for Configurable Accelerators Using C++ Templates
Symposium on Rapid System Prototyping (Seoul, South Korea, 10/19/17 - 10/20/17)
BibTeX: Download
Roloff S., Pöppl A., Schwarzer T., Wildermann S., Baader M., Glaß M., Hannig F., Teich J.:
ActorX10: An Actor Library for X10
ACM SIGPLAN X10 Workshop (X10), ACM (Santa Barbara, CA)
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Tanase AP., Witterauf M., Sousa É., Lari V., Hannig F., Teich J.:
LoopInvader: A Compiler for Tightly Coupled Processor Arrays
Design, Automation and Test in Europe (DATE) (Dresden, 03/14/16 - 03/18/16)
URL: https://www.date-conference.com/system/files/file/date16/ubooth/37913.pdf
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Roloff S., Hannig F., Teich J.:
InvadeSIM: A Simulator for Heterogeneous Multi-Processor Systems-on-Chip
Design, Automation and Test in Europe (DATE) (Dresden, 03/14/16 - 03/18/16)
URL: https://www.date-conference.com/system/files/file/date16/ubooth/37912.pdf
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Roloff S., Wildermann S., Hannig F., Teich J.:
Invasive computing for predictable stream processing: A simulation-based case study
13th IEEE Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2015 (Amsterdam, 10/08/15 - 10/09/15)
DOI: 10.1109/ESTIMedia.2015.7351761
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Tanase AP., Witterauf M., Teich J., Hannig F., Lari V.:
On-demand fault-tolerant loop processing on massively parallel processor arrays
26th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2015 (Toronto, 07/27/15 - 07/29/15)
DOI: 10.1109/ASAP.2015.7245734
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Lari V., Tanase AP., Teich J., Witterauf M., Khosravi F., Hannig F., Meyer B.:
A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable Arrays
NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2015 (Montreal, 06/15/16 - 06/18/15)
DOI: 10.1109/AHS.2015.7231157
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Roloff S., Schafhauser D., Hannig F., Teich J.:
Execution-driven parallel simulation of PGAS applications on heterogeneous tiled architectures
52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015 (San Francisco, CA, 06/07/15 - 06/11/15)
DOI: 10.1145/2744769.2744840
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