Veröffentlichungen

Darne B., Karim A., Matrangolo PA., Falk J., O'Connor I., Marchand C., Bosio A., Teich J.:
FeMFET-based High Performance, Ultra-Low Power Memory Cells for Reliable State Retention of Dataflow Networks
38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems; Special Session (Barcelona, Spain, 21. Oktober 2025 - 23. Oktober 2025)
In: Proc. of the 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 2025
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Deutel M., Kontes G., Mutschler C., Teich J.:
Combining Multi-Objective Bayesian Optimization with Reinforcement Learning for TinyML
In: ACM Transactions on Evolutionary Learning and Optimization 5 (2025), S. 1-21
ISSN: 2688-299X
DOI: 10.1145/3715012
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Deutel M., Kontes G., Mutschler C., Teich J.:
Multi-Objective Bayesian Optimization with Reinforcement Learning for Edge Deployment of DNNs on Microcontrollers
The Genetic and Evolutionary Computation Conference (GECCO) (Málaga, 14. Juli 2025 - 18. Juli 2025)
In: ACM (Hrsg.): GECCO '25 Companion: Proceedings of the Genetic and Evolutionary Computation Conference Companion 2025
DOI: 10.1145/3712255.3734232
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Deutel M., Mutschler C., Teich J.:
microYOLO: Towards Single-Shot Object Detection on Microcontrollers
4th Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM) (Torino, 18. September 2023 - 22. September 2023)
In: University of Turin (Hrsg.): International Workshops of ECML PKDD 2023, Turin, Italy, September 18–22, 2023, Revised Selected Papers, Part V 2025
DOI: 10.1007/978-3-031-74643-7_13
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Deutel M., Plinge A., Seuss D., Mutschler C., Hannig F., Teich J.:
Unsupervised Learning of Variational Autoencoders on Cortex-M Microcontrollers
IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) (Singapore, 15. Dezember 2025 - 18. Dezember 2025)
In: IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) 2025
DOI: 10.1109/MCSoC67473.2025.00079
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Esper K., Wildermann S., Teich J.:
Response Range Optimization for Run-Time Requirement Enforcement on MPSoCs
30th Asia and South Pacific Design Automation Conference ASP-DAC 2025 (Tokyo, 20. Januar 2025 - 23. Januar 2025)
In: Proceedings of the 30th Asia and South Pacific Design Automation Conference 2025
DOI: 10.1145/3658617.3697552
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Esper K., Wildermann S., Teich J.:
Run-time Requirement Enforcement of Safety Requirements of Human-Robot Interactions
International Conference on Automation, Robotics, and Applications (Zagreb, 12. Februar 2025 - 14. Februar 2025)
In: 2025 11th International Conference on Automation, Robotics, and Applications (ICARA) 2025
DOI: 10.1109/ICARA64554.2025.10977632
URL: https://ieeexplore.ieee.org/document/10977632
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Groth S., Heidorn C., Schmid M., Teich J., Hannig F.:
Latency-Constrained Neural Architecture Search for U-Nets on Graphics Processing Units
28th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) (Rostock, 11. März 2025 - 12. März 2025)
In: Proceedings of the 28th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV), 2025
URL: https://ieeexplore.ieee.org/document/11047216
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Hahn T., Hofmann J., Wildermann S., Teich J.:
FSST Compression of JSON Data on FPGAs
38th GI/ITG International Conference on Architecture of Computing Systems (Kiel, 22. April 2025 - 24. April 2025)
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Hahn T., Langohr M., Becher A., Beena Gopalakrishnan Nair L., Meyer-Wegener K., Teich J., Wildermann S.:
ReProVide: Query Optimization and Near-Data Processing on Reconfigurable SoCs for Big Data Analysis
In: Scalable Data Management for Future Hardware, 2025, S. 171-197
ISBN: 9783031740961
DOI: 10.1007/978-3-031-74097-8_7
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Hahn T., Langohr M., Meißner S., Döring B., Wildermann S., Meyer-Wegener K., Teich J.:
ReProVide: Query Optimisation and Near-Data Processing on Reconfigurable SoCs for Big Data Analysis
21st Conference on Database Systems for Business, Technology and Web (Bamberg, 3. März 2025 - 7. März 2025)
In: Proceedings of the 21st Conference on Database Systems for Business, Technology and Web 2025
DOI: 10.18420/BTW2025-57
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Hernandez Morales JJ., Hannig F., Teich J.:
A SIMD MAC RISC-V Extension with Approximate Multipliers for Accelerating CNN Inference in Tiny Embedded Devices
38th GI/ITG International Conference on Architecture of Computing Systems (Kiel, 22. April 2025 - 24. April 2025)
In: Sven Tomforde, Christian Krupitzer, Stephane Vialle, Estela Suarez, and Thilo Pionteck (Hrsg.): Architecture of Computing Systems, 38th International Conference, ARCS 2025, Kiel, Germany, April 22–24, 2025, Proceedings 2025
DOI: 10.1007/978-3-032-03281-2_12
URL: https://link.springer.com/chapter/10.1007/978-3-032-03281-2_12
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Karim A., Falk J., Teich J.:
Exploration of Clock and Power Gating Tradeoffs for the Design of Self-Powering Dataflow Networks
28. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) (Rostock Warnemünde, 11. März 2025 - 12. März 2025)
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Krüger P., Wildermann S., Teich J.:
Breaking Confidentiality of XTS-AES Encrypted Data at Rest on Microprocessors using Electromagnetic Side-Channel Attacks
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) (San Jose, 5. Mai 2025 - 8. Mai 2025)
In: IEEE (Hrsg.): 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2025
DOI: 10.1109/HOST64725.2025.11050075
URL: https://ieeexplore.ieee.org/document/11050075
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Lamberti P., Esper K., Spieck J., Velasco-Guillen RJ., Beckerle P., Teich J.:
Enforcing Safety Requirements of a Knee Orthosis Using Finite State Machines
2nd International Conference on Integrated Systems in Medical Technologies (ISMT) (Erlangen, 25. September 2024 - 26. September 2024)
In: 2024 2nd International Conference on Integrated Systems in Medical Technologies (ISMT) 2025
DOI: 10.1109/ISMT62540.2024.10985961
URL: https://ieeexplore.ieee.org/document/10985961
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Plagwitz P., Hannig F., Teich J., Keszocze O.:
DSL-based SNN Accelerator Design using Chisel
In: Microprocessors and Microsystems 118 (2025), Art.Nr.: 105187
ISSN: 0141-9331
DOI: 10.1016/j.micpro.2025.105187
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Sabih M., Abdo M., Hannig F., Teich J.:
Beyond BNNs: Design and Acceleration of Sub-Bit Neural Networks using RISC-V Custom Functional Units
In: IEEE Embedded Systems Letters 17 (2025), S. 329-332
ISSN: 1943-0663
DOI: 10.1109/LES.2025.3600565
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Sesli B., Sabih M., Hannig F., Teich J.:
Design of Machine Learning Accelerators as RISC-V Extensions using an Open Source Tool Flow
International Conference on Computer Aided Design (ICCAD) (Munich, 26. Oktober 2025 - 30. Oktober 2025)
In: IEEE (Hrsg.): Proceedings of the International Conference on Computer Aided Design (ICCAD) 2025
DOI: 10.1109/ICCAD66269.2025.11240834
URL: https://ieeexplore.ieee.org/document/11240834
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Seum T., Krüger P., Wildermann S., Teich J.:
Die Verwendung von Seitenkanalangriffen durch die Strafverfolgungsbehörden Impraktikabel oder ein mächtiges Werkzeug?
In: MultiMedia und Recht (2025), S. 98-104
ISSN: 1434-596X
URL: https://beck-online.beck.de/Bcid/Y-300-Z-MMR-B-2025-S-98-N-1
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Sixdenier PL.:
Data-Aware Energy Management in Energy-Harvesting Wireless Sensor Networks
22nd International Conference on Embedded Wireless Systems and Networks (EWSN 2025) Rising Stars Forum (Leuven, Belgium, 22. September 2025 - 25. September 2025)
In: 22nd International Conference on Embedded Wireless Systems and Networks (EWSN 2025) 2025
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Sixdenier PL., Deutel M., Teich J.:
Early-Exit Neural Architecture Search for Energy-Harvesting Edge Computing
2025 IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) (Singapore, 15. Dezember 2025 - 18. Dezember 2025)
In: 2025 IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) 2025
DOI: 10.1109/MCSoC67473.2025.00066
URL: https://ieeexplore.ieee.org/document/11311064
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Sixdenier PL., Wildermann S., Arockiaraj J., Teich J.:
WiP Paper: Utility-Aware Transmission of Sensor Data on Energy-Harvesting IoT Gateways
22nd International Conference on Embedded Wireless Systems and Networks (EWSN 2025) (Leuven, Belgium, 22. September 2025 - 25. September 2025)
In: 22nd International Conference on Embedded Wireless Systems and Networks (EWSN 2025) 2025
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Spieck J.:
A Learning-Based Methodology for Hybrid Application Mapping on Heterogeneous MPSoCs (Dissertation, 2025)
DOI: 10.25593/open-fau-2125
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Spieck J., Walter D., Waschkeit J., Teich J.:
Co-Design of Sustainable Embedded Systems-on-Chip
Design, Automation & Test in Europe Conference (DATE) (Lyon, 31. März 2025 - 2. April 2025)
In: Design, Automation and Test in Europe Conference 2025
DOI: 10.23919/DATE64628.2025.10992914
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Spieck J., Walter D., Waschkeit J., Teich J.:
Co-Design of Systems-on-Chip for Sustainability
NG-RES 2025: Sixth Workshop on Next Generation Real-Time Embedded Systems (Barcelona, Spain, 20. Januar 2025 - 22. Januar 2025)
DOI: 10.4230/OASIcs.NG-RES.2025.3
URL: https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.NG-RES.2025.3
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Tahoori M., Becker J., Henkel J., Kunz W., Schlichtmann U., Sigl G., Teich J., Wehn N.:
Multi-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage)
2025 Design, Automation and Test in Europe Conference, DATE 2025 (Lyon, 31. März 2025 - 2. April 2025)
In: 2025 Design, Automation & Test in Europe Conference (DATE) 2025
DOI: 10.23919/DATE64628.2025.10992986
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Tahoori M., Meyers V., Sadeghipour Roodsari M., Xu H., Becker J., Harbaum T., Frombach F., Höfer J., Sotiropoulos G., Henkel J., Demirdag Z., Khdr H., Nassar H., Schlichtmann U., Geier J., van Kempen P., Sigl G., Kögler S., Probst M., Teich J., Hannig F., Sabih M., Sesli B., Wehn N., Steiner L., Kunz W., Shelkamy Ali M.:
Special Session – Hardware-Software Co-Design for Machine Learning Systems Made Open-Source
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Taipei, 28. September 2025 - 3. Oktober 2025)
In: ACM (Hrsg.): Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2025
DOI: 10.1145/3742873.3756928
URL: https://dl.acm.org/doi/10.1145/3742873.3756928
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Tahoori MB., Becker J., Henkel J., Kunz W., Schlichtmann U., Sigl G., Teich J., Wehn N.:
Multi-Partner Project: Open-source Design Tools for Co-development of AI Algorithms and AI Chips
Design, Automation and Test in Europe Conference 2025 (Lyon, 31. März 2025 - 2. April 2025)
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Walter D., Brand M., Heidorn C., Witterauf M., Hannig F., Teich J.:
Europractice activity report 2024
(2025), S. 29-30
URL: https://europractice-ic.com/wp-content/uploads/2025/03/Europractice_ActivityReport2024_webversion.pdf
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(Techreport)
Walter D., Halm M., Seidel D., Ghosh I., Heidorn C., Hannig F., Teich J.:
Evaluation of CGRA Toolchains
1st Workshop on Open Source Solutions for Massively Parallel Integrated Circuits (OSSMPIC) (Lyon, 31. März 2025 - 2. April 2025)
In: In Proceedings of the 1st Workshop on Open Source Solutions for Massively Parallel Integrated Circuits (OSSMPIC) 2025
DOI: 10.48550/arXiv.2502.19114
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Wilbert N., Szymanski M., Wildermann S., Herzog H., Hoenig T., Teich J.:
CHaOS: A Persistent Lightweight Cache Hybridization-aware OS
38th GI/ITG International Conference on Architecture of Computing Systems (Kiel, 22. April 2025 - 24. April 2025)
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Wildermann S., Wilbert N., Häberlein T., Teich J.:
Self-powered Embedded Systems: The Role of Non-volatile Memory Technology in IoT Devices
In: Gidon Ernst, Matthias Güdemann, Alexander Knapp, Florian Nafz, Frank Ortmeier, Hella Ponsar, Gerhard Schellhorn, Alexander Schiendorfer (Hrsg.): Go Where the Bugs Are: Essays Dedicated to Wolfgang Reif on the Occasion of His 65th Birthday, Cham: Springer, 2025, S. 155-177 (Lecture Notes in Computer Science)
ISBN: 978-3-031-92195-7
DOI: 10.1007/978-3-031-92196-4_8
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Bassimir B., Wanka R.:
On the Computation of Robust Examination Timetables: Methods and Experimental Results
In: Journal of Scheduling (2024)
ISSN: 1094-6136
DOI: 10.1007/s10951-024-00815-y
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Deutel M., Hannig F., Mutschler C., Teich J.:
Fused-Layer CNNs for Memory-Efficient Inference on Microcontrollers
Workshop on Machine Learning and Compression @ NeurIPS 2024 (Vancouver Convention Center, 10. Dezember 2024 - 15. Dezember 2024)
Open Access: https://openreview.net/forum?id=2O8qbyxH6X
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Deutel M., Hannig F., Mutschler C., Teich J.:
On-Device Training of Fully Quantized Deep Neural Networks on Cortex-M Microcontrollers
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 44 (2024), S. 1250 - 1261
ISSN: 0278-0070
DOI: 10.1109/TCAD.2024.3484354
URL: https://ieeexplore.ieee.org/document/10726519
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Esper K., Teich J.:
History-Based Run-Time Requirement Enforcement of Non-Functional Properties on MPSoCs
Fifth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2024) (Munich, 17. Januar 2024 - 19. Januar 2024)
In: Patrick Meumeu Yomsi, Stefan Wildermann (Hrsg.): Fifth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2024), Saarbrücken/Wadern: 2024
DOI: 10.4230/OASIcs.NG-RES.2024.4
URL: https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.NG-RES.2024.4
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Esper K., Wildermann S., Teich J.:
Range-Based Run-time Requirement Enforcement of Non-Functional Properties on MPSoCs
Design, Automation and Test in Europe Conference (Valencia, 25. März 2024 - 27. März 2024)
In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2024 2024
DOI: 10.23919/DATE58400.2024.10546881
URL: https://ieeexplore.ieee.org/document/10546881
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Groth S., Schmid M., Teich J., Hannig F.:
Estimating the Execution Time of CNN Inference on GPUs
27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) (Kaiserslautern, 14. Februar 2024 - 15. Februar 2024)
In: Proceedings of the 27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) 2024
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Hahn T., Schüll D., Wildermann S., Teich J.:
ABACUS: ASIP-based Avro Schema-customizable Parser Acceleration on FPGAs
International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) (Kielce, 3. April 2024 - 5. April 2024)
In: IEEE Proceedings of the 27th International Symposium on Design and Diagnostics of Electronic Circuits & Systems 2024
DOI: 10.1109/DDECS60919.2024.10508904
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Hahn T., Wildermann S., Teich J.:
JSON-CooP: A JSON Decompression/Parsing Co-Design for FPGAs
International Conference on Field-Programmable Logic and Applications (FPL) (Turin, 2. September 2024 - 6. September 2024)
In: IEEE Proceedings of the 34th International Conference on Field-Programmable Logic and Applications 2024
DOI: 10.1109/FPL64840.2024.00012
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Heidorn C., Hannig F., Riedelbauch D., Strohmeyer C., Teich J.:
Efficient Deployment of Neural Networks for Thermal Monitoring on AURIX TC3xx Microcontrollers
10th International Conference on Vehicle Technology and Intelligent Transport Systems (VEHITS) (Angers, 2. Mai 2024 - 4. Mai 2024)
DOI: 10.5220/0000186800003702
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Heidorn C., Hannig F., Riedelbauch D., Strohmeyer C., Teich J.:
OpTC – A Toolchain for Deployment of Neural Networks on AURIX TC3xx Microcontrollers
In: The Computing Research Repository (CoRR), 2024
DOI: 10.48550/arXiv.2404.15833
URL: https://arxiv.org/abs/2404.15833
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(online publication)
Heidorn C., Hannig F., Riedelbauch D., Strohmeyer C., Teich J.:
OpTC – A Toolchain for Deployment of Neural Networks on AURIX TC3xx Microcontrollers
2024 Stuttgart International Symposium on Automotive and Engine Technology (Stuttgart, 2. Juli 2024 - 3. Juli 2024)
In: André Casal Kulzer, Hans-Christian Reuss, Andreas Wagner (Hrsg.): Proceeding of the 2024 Stuttgart International Symposium on Automotive and Engine Technology, Wiesbaden: 2024
DOI: 10.1007/978-3-658-45018-2_4
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Heidorn C., Sabih M., Meyerhöfer N., Schinabeck C., Teich J., Hannig F.:
Hardware-Aware Evolutionary Explainable Filter Pruning for Convolutional Neural Networks
In: International Journal of Parallel Programming 52 (2024), S. 40 - 58
ISSN: 0885-7458
DOI: 10.1007/s10766-024-00760-5
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Jungnitz N., Keszöcze O.:
SAS - A Framework for Symmetry-based Approximate Synthesis
Design Automation Conference (San Francisco, 23. Juni 2024 - 27. Juni 2024)
DOI: 10.1145/3649329.3658495
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Karim A., Falk J., Schmidt D., Teich J.:
Self-Powering Dataflow Networks – Concepts and Implementation
22nd ACM-IEEE International Symposium on Formal Methods and Models for System Design (MEMOCODE) (Raleigh, NC, 3. Oktober 2024 - 4. Oktober 2024)
In: Proceedings of the 22nd ACM-IEEE International Symposium on Formal Methods and Models for System Design (MEMOCODE) 2024
DOI: 10.1109/MEMOCODE63347.2024.00013
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Kergaßner M., Keszöcze O., Wanka R.:
Markov Chain-based Optimization Time Analysis of Bivalent Ant Colony Optimization for Sorting and LeadingOnes
Genetic and Evolutionary Computation Conference (GECCO) (Melbourne, 14. Juli 2024 - 18. Juli 2024)
DOI: 10.1145/3638529.3654022
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Krüger P., Wildermann S., Teich J.:
CRESTS: Chronology-based Reconstruction for Side-Channel Trace Segmentation for XTS-AES on Complex Targets
17th European Workshop on Systems Security (EuroSec) (Athen, 22. April 2024 - 22. April 2024)
In: Association for Computing Machinery (ACM) (Hrsg.): EUROSEC '24: Proceedings of the 17th European Workshop on System Security 2024
DOI: 10.1145/3642974.3652286
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Letras M.:
Techniques for Efficient Performance Analysis and Memory Optimization in Mapping Dataflow Models of Computation onto Embedded Systems (Dissertation, 2024)
DOI: 10.25593/open-fau-1040
URL: https://open.fau.de/handle/openfau/31834
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Letras M., Falk J., Teich J.:
Exploring Multi-Reader Buffers and Channel Placement during Dataflow Network Mapping to Heterogeneous Many-core Systems
In: IEEE Access 12 (2024), S. 39748-39769
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2024.3375079
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Letras M., Morales-Reyes A., Cumplido R., Martínez-Peñaloza MG., Feregrino-Uribe C.:
A novel partition strategy for efficient implementation of 3D Cellular Genetic Algorithms
In: Microprocessors and Microsystems 104 (2024), Art.Nr.: 104986
ISSN: 0141-9331
DOI: 10.1016/j.micpro.2023.104986
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Meumeu Yomsi P., Wildermann S. (Hrsg.):
Fifth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2024)
2024
(Open Access Series in Informatics (OASIcs), Bd. 117)
ISBN: 978-3-95977-313-3
Open Access: https://www.dagstuhl.de/dagpub/978-3-95977-313-3
URL: https://www.dagstuhl.de/dagpub/978-3-95977-313-3
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Plagwitz P., Hannig F., Teich J., Keszöcze O.:
Compiler-based Processor Network Generation for Neural Networks on FPGAs
27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) (Kaiserslautern, 14. Februar 2024 - 15. Februar 2024)
In: Proceedings of the 27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) 2024
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Plagwitz P., Hannig F., Teich J., Keszöcze O.:
DSL-based SNN Accelerator Design using Chisel
27th Euromicro Conference Series on Digital System Design (DSD) (Paris, 27. August 2024 - 30. August 2024)
In: Proceedings of the 27th Euromicro Conference on Digital Systems Design (DSD) 2024
DOI: 10.1109/DSD64264.2024.00032
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Plagwitz P., Hannig F., Teich J., Keszöcze O.:
SNN vs. CNN Implementations on FPGAs: An Empirical Evaluation
20th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC) (Aveiro, 20. März 2024 - 22. März 2024)
In: Proceedings of the 20th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC) 2024
DOI: 10.1007/978-3-031-55673-9_1
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Sabih M., Karim A., Wittmann J., Hannig F., Teich J.:
Hardware/Software Co-Design of RISC-V Extensions for Accelerating Sparse DNNs on FPGAs
International Conference on Field Programmable Technology (FPT) (Sydney, Australia, 10. Dezember 2024 - 12. Dezember 2024)
In: IEEE (Hrsg.): Proceedings of International Conference on Field Programmable Technology (FPT) 2024
DOI: 10.1109/ICFPT64416.2024.11113397
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Sabih M., Sesli B., Hannig F., Teich J.:
Accelerating DNNs using Weight Clustering on RISC-V Custom Functional Units
Conference on Design, Automation and Test in Europe (DATE) (Valencia, 25. März 2024 - 27. März 2024)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE) 2024
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Sixdenier PL., Reinhold L., Piotrowski K.:
The Base Station
In: Weather stations for biodiversity: a comprehensive approach to an automated and modular monitoring system, Advanced Books, 2024, S. 189-203
ISBN: 9786192481230
DOI: 10.3897/ab.e119534
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Sixdenier PL., Wildermann S., Teich J.:
GRES: Guaranteed Remaining Energy Scheduling of Energy-harvesting Sensors by Quality Adaptation
Cyber-Physical Systems & Internet of Things 2024 (CPS&IoT'2024) (Budva, Montenegro, 11. Juni 2024 - 14. Juni 2024)
In: Proceedings of the 13th Mediterranean Conference on Embedded Computing (MECO) 2024
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Spieck J., Wildermann S., Teich J.:
A Scenario-Based DVFS-Aware Hybrid Application Mapping Methodology for MPSoCs
In: ACM Transactions on Design Automation of Electronic Systems (2024)
ISSN: 1084-4309
DOI: 10.1145/3660633
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Walter D., Adamtschuk T., Hannig F., Teich J.:
Analysis and Optimization of Block LU Decomposition for Execution on Tightly Coupled Processor Arrays
35th IEEE International Conference on Application-specific Systems, Architectures and Processors (Hong Kong, 24. Juli 2024 - 26. Juli 2024)
In: Proceedings of the IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2024
DOI: 10.1109/ASAP61560.2024.00029
URL: https://ieeexplore.ieee.org/document/10631126
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Walter D., Brand M., Heidorn C., Witterauf M., Hannig F., Teich J.:
ALPACA: An Accelerator Chip for Nested Loop Programs
IEEE International Symposium on Circuits and Systems (ISCAS) (Singapore, 19. Mai 2024 - 22. Mai 2024)
In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2024
DOI: 10.1109/ISCAS58744.2024.10558549
URL: https://ieeexplore.ieee.org/document/10558549
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Wilbert N., Wildermann S., Teich J.:
Hybrid Cache Design Under Varying Power Supply Stability - A Comparative Study
10th International Symposium on Memory Systems (Washington, D.C., 30. September 2024 - 3. Oktober 2024)
In: MEMSYS '24: Proceedings of the International Symposium on Memory Systems 2024
DOI: 10.1145/3695794.3695819
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Wilbert N., Wildermann S., Teich J.:
To Keep or Not to Keep - The Volatility of Replacement Policy Metadata in Hybrid Caches
2nd Workshop on Disruptive Memory Systems (Austin, TX, 3. November 2024 - 3. November 2024)
In: Proceedings of the 2nd Workshop on Disruptive Memory Systems 2024
DOI: 10.1145/3698783.3699381
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Witt N., Deutel M., Sobel C., Schubert J., Woller P.:
Energy-Efficient AI on the Edge
In: Christopher Mutschler, Christian Münzenmayer, Norman Uhlmann, Alexander Martin (Hrsg.): Unlocking Artificial Intelligence: From Theory to Applications, Springer Link, 2024, S. 359 - 380
DOI: 10.1007/978-3-031-64832-8_19
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Yomsi PM., Wildermann S. (Hrsg.):
Fifth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2024)
Wadern: 2024
(OpenAccess Series in Informatics (OASIcs), Bd. 117)
ISBN: 9783959773133
DOI: 10.4230/OASIcs.NG-RES.2024.0
BibTeX: Download

Bartunik M., Kirchner J., Keszöcze O.:
Artificial Intelligence for Molecular Communication
In: it - Information Technology (2023)
ISSN: 1611-2776
DOI: 10.1515/itit-2023-0029
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Bosio A., Barbareschi M., Savino A., Han J., Teich J.:
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems
In: IEEE Design & Test 40 (2023), S. 5-7
ISSN: 2168-2356
DOI: 10.1109/MDAT.2022.3221909
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Brand P.:
Reduction of Mobile Device Modem Energy via Adapative and Power-efficient Hybrid Online/Offline Grant Prediction for the Protocol Standards LTE and 5G (Dissertation, 2023)
URL: https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-233190
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Deutel M., Woller P., Mutschler C., Teich J.:
Energy-efficient Deployment of Deep Learning Applications on Cortex-M based Microcontrollers using Deep Compression
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen MBMV’23 (Freiburg, 23. März 2023 - 24. März 2023)
In: VDE (Hrsg.): MBMV 2023; 26th Workshop 2023
Open Access: https://arxiv.org/abs/2205.10369
URL: https://ieeexplore.ieee.org/document/10173060
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Esper K., Spieck J., Sixdenier PL., Wildermann S., Teich J.:
RAVEN: Reinforcement Learning for Generating Verifiable Run-time Requirement Enforcers for MPSoCs
Workshop on Next Generation Real-Time Embedded Systems Co-located with HiPEAC 2023 (Toulouse, 18. Januar 2023 - 18. Januar 2023)
In: Fourth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2023), Dagstuhl, Germany: 2023
DOI: 10.4230/OASIcs.NG-RES.2023.7
URL: https://drops.dagstuhl.de/opus/volltexte/2023/17738
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Esper K., Wildermann S., Teich J.:
Automatic Synthesis of FSMs for Enforcing Non-Functional Requirements on MPSoCs Using Multi-Objective Evolutionary Algorithms
In: ACM Transactions on Design Automation of Electronic Systems 28 (2023), S. 1-20
ISSN: 1084-4309
DOI: 10.1145/3617832
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Hahn T., Schüll D., Wildermann S., Teich J.:
An FPGA Avro Parser Generator for Accelerated Data Stream Processing
2nd Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) (Dresden, 6. März 2023 - 10. März 2023)
In: Proceedings of the 2nd Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) 2023
DOI: 10.18420/BTW2023-46
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Hahn T., Wildermann S., Teich J.:
SPEAR-JSON: Selective parsing of JSON to enable accelerated stream processing on FPGAs
International Conference on Field-Programmable Logic and Applications (FPL) (Göteborg, 4. September 2023 - 8. September 2023)
In: IEEE Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications 2023
DOI: 10.1109/FPL60245.2023.00034
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Heil A., Keszöcze O.:
Fast Approximate AIG-Based Synthesis
In: Rolf Drechsler, Sebastian Huhn (Hrsg.): Advanced Boolean Techniques, Springer, 2023, S. 17 -- 32
ISBN: 978-3-031-28915-6
DOI: 10.1007/978-3-031-28916-3
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Henkel J., Sidduh L., Bauer L., Teich J., Wildermann S., Tahoori MB., Mayahinia M., Castrillon J., Khan AA., Farzaneh H., de Lima JPC., Chen JJ., Hakert C., Chen KH., Yang CL., Cheng HY.:
Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications
International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES) (HAMBURG, 18. September 2023 - 20. September 2023)
In: Proceedings of the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES) 2023
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Letras M., Falk J., Teich J.:
Throughput and Memory Optimization for Parallel Implementations of Dataflow Networks using Multi-Reader Buffers
Fourth Workshop on Next Generation Real-Time Embedded Systems (Toulouse, 18. Januar 2023 - 18. Januar 2023)
In: Fourth Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2023), Germany: 2023
DOI: 10.4230/OASIcs.NG-RES.2023.6
URL: https://drops.dagstuhl.de/opus/volltexte/2023/17737/
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Plagwitz P., Hannig F., Teich J., Keszöcze O.:
To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations
(2023)
Open Access: https://arxiv.org/abs/2306.12742
URL: https://arxiv.org/abs/2306.12742
BibTeX: Download
(online publication)
Pradhan C., Letras M., Teich J.:
Efficient Table-based Function Approximation on FPGAs using Interval Splitting and BRAM Instantiation
In: ACM Transactions on Embedded Computing Systems 22 (2023), S. 1-24
ISSN: 1539-9087
DOI: 10.1145/3580737
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Sabih M., Yayla M., Hannig F., Teich J., Chen JJ.:
Robust and Tiny Binary Neural Networks using Gradient-based Explainability Methods
EuroMLSys '23: Proceedings of the 3rd Workshop on Machine Learning and Systems (Rome, Italy, 8. Mai 2023 - 8. Mai 2023)
In: Eiko Yoneki, Luigi Nardi (Hrsg.): EuroMLSys '23: Proceedings of the 3rd Workshop on Machine Learning and System, New York(NY) United States: 2023
DOI: 10.1145/3578356.3592595
URL: https://dl.acm.org/doi/10.1145/3578356.3592595
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Sixdenier PL., Wildermann S., Ottens M., Teich J.:
Seque: Lean and Energy-aware Data Management for IoT Gateways
IEEE International Conference on Edge Computing and Communications (EDGE) (Chicago, Illinois USA, 2. Juli 2023 - 8. Juli 2023)
DOI: 10.1109/EDGE60047.2023.00030
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Spieck J., Sixdenier PL., Esper K., Wildermann S., Teich J.:
Hybrid Genetic Reinforcement Learning for Generating Run-Time Requirement Enforcers
21st ACM-IEEE International Symposium on Formal Methods and Models for System Design (MEMOCODE) (Hamburg, 21. September 2023 - 23. September 2023)
In: 2023 21st ACM-IEEE International Symposium on Formal Methods and Models for System Design (MEMOCODE) 2023
DOI: 10.1145/3610579.3611091
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Spieck J., Wildermann S., Teich J.:
A Learning-Based Methodology for Scenario-Aware Mapping of Soft Real-Time Applications onto Heterogeneous MPSoCs
In: ACM Transactions on Design Automation of Electronic Systems 28 (2023), S. 4:1 - 4:40
ISSN: 1084-4309
DOI: 10.1145/3529230
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Trautmann J.:
Automation Approaches for the Application of Side-Channel Analysis in Real-World Scenarios (Dissertation, 2023)
URL: https://open.fau.de/items/e894c57d-0839-4677-8614-ab7ac59edc91
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Trautmann J., Krüger P., Becher A., Wildermann S., Teich J.:
Design, Calibration, and Evaluation of Real-Time Waveform Matching on an FPGA-based Digitizer at 10 GS/s
In: ACM Transactions on Reconfigurable Technology and Systems (2023), S. 1-27
ISSN: 1936-7406
DOI: 10.1145/3635719
URL: https://dl.acm.org/doi/10.1145/3635719
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Urfei J., Smirnov F., Weichslgartner A., Wildermann S.:
Gradient-Free Adversarial Attacks on 3D Point Clouds from LiDAR Sensors
In: Springer International Publishing (Hrsg.): Machine Learning and Optimization Techniques for Automotive Cyber-Physical Systems, 2023, S. 225 - 256
ISBN: 978-3-031-28015-3
DOI: 10.1007/978-3-031-28016-0_7
URL: https://link.springer.com/chapter/10.1007/978-3-031-28016-0_7
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Özkan MA.:
Declarative Programming Techniques for Hardware Synthesis of Image Processing Applications (Dissertation, 2023)
BibTeX: Download

Anantharajaiah N., Asfour T., Bader M., Bauer L., Becker J., Bischof S., Brand M., Bungartz HJ., Eichler C., Esper K., Falk J., Fasfous N., Freiling F., Fried A., Gerndt M., Glaß M., Gonzalez J., Hannig F., Heidorn C., Henkel J., Herkersdorf A., Herzog B., John J., Hönig T., Hundhausen F., Khdr H., Langer T., Lenke O., Lesniak F., Lindermayr A., Listl A., Maier S., Megow N., Mettler M., Müller-Gritschneder D., Nassar H., Paus F., Pöppl A., Pourmohseni B., Rabenstein J., Raffeck P., Rapp M., Rivas SN., Sagi M., Schirrmacher F., Schlichtmann U., Schmaus F., Schröder-Preikschat W., Schwarzer T., Sikal MB., Simon B., Snelting G., Spieck J., Srivatsa A., Stechele W., Teich J., Comprés Ureña IA., Verbauwhede I., Walter D., Wild T., Wildermann S., Wille M., Witterauf M., Zhang L.:
Invasive Computing
FAU University Press, 2022
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Bader M., Wildermann S., Glaß M., Pöppl A., Pourmohseni B., Schwarzer T., Spieck J., Wille M.:
Characterisation and Analysis of Invasive Algorithmic Patterns
In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing, FAU University Press, 2022, S. 97-122
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Bartunik M., Keszöcze O., Schiller B., Kirchner J.:
Deep Learning to Demodulate Transmissions in Molecular Communication
6th Workshop on Molecular Communications (Warwick, 13. Juli 2022 - 15. Juli 2022)
In: Proceedings of the 6th Workshop on Molecular Communications 2022
DOI: 10.1109/ismict56646.2022.9828263
URL: https://molecularcommunications.org/wp-content/uploads/2022/07/Deep-Learning-to-Demodulate-Transmission-in-Molecular-Communication.pdf
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Bartunik M., Keszöcze O., Schiller B., Kirchner J.:
Using Deep Learning to Demodulate Transmissions in Molecular Communication
2022 IEEE 16th International Symposium on Medical Information and Communication Technology (ISMICT) (Online, 2. Mai 2022 - 4. Mai 2022)
DOI: 10.1109/ISMICT56646.2022.9828263
URL: https://ieeexplore.ieee.org/document/9828263
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Becher A.:
Near-Data Query Processing on Heterogeneous FPGA-based Systems (Dissertation, 2022)
URL: https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-189289
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Becker J., Hannig F., Wild T., Brand M., Lenke O., Lesniak F.:
Validation and Demonstrator
In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing, FAU University Press, 2022, S. 411-431
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Brand M., Keszöcze O., Teich J.:
Precision- and Accuracy-Reconfigurable Processor Architectures—An Overview
In: IEEE Transactions on Circuits and Systems II: Express Briefs 69 (2022), S. 2661 - 2666
ISSN: 1057-7130
DOI: 10.1109/TCSII.2022.3173753
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Brand P., Hackenberg B., Falk J., Teich J.:
Grant Prediction-based Dynamic Power Management for 5G to Reduce Mobile Device Energy Consumption
International Wireless Communications and Mobile Computing Conference (IWCMC 2022) (Dubrovnik)
DOI: 10.1109/iwcmc55113.2022.9824349
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Bustio-Martinez L., Cumplido R., Letras M., Hernandez-Leon R., Feregrino-Uribe C., Hernandez-Palancar J.:
FPGA/GPU-based Acceleration for Frequent Itemsets Mining: A Comprehensive Review
In: ACM Computing Surveys 54 (2022)
ISSN: 0360-0300
DOI: 10.1145/3472289
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Echavarria Gutiérrez JA.:
On the Approximation of Arithmetic Functions and Logic Snythesis of Approximate Very Large Boolean Networks (Dissertation, 2022)
URL: https://opus4.kobv.de/opus4-fau/files/20100/DissertationJorgeEchavarria.pdf
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Echavarria Gutiérrez JA., Keszöcze O., Teich J.:
Probability-based DSE of Approximated LUT-based FPGA Designs
15th IEEE Dallas Circuits and Systems Conference (Dallas, 17. Juni 2022 - 19. Juni 2022)
DOI: 10.1109/dcas53974.2022.9845591
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Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Khosravi F., Becher A., Teich J.:
Design and Error Analysis of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
In: it - Information Technology (2022)
ISSN: 1611-2776
DOI: 10.1515/itit-2021-0040
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Esper K., Wildermann S., Teich J.:
Multi-requirement Enforcement of Non-Functional Properties on MPSoCs Using Enforcement FSMs - A Case Study
Workshop on Next Generation Real-Time Embedded Systems (NG-RES) (Budapest, 22. Juni 2022 - 22. Juni 2022)
In: Third Workshop on Next Generation Real-Time Embedded Systems (NG-RES 2022), Dagstuhl, Germany: 2022
DOI: 10.4230/OASIcs.NG-RES.2022.2
URL: https://drops.dagstuhl.de/opus/volltexte/2022/16110/
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Friedemann A., Keszöcze O.:
Towards Clause Learning a la Carte through VarMonads
International Symposium on Logic-based Program Synthesis and Transformation (Tbilisi, 21. September 2022 - 23. September 2022)
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Hahn T., Becher A., Wildermann S., Teich J.:
Raw Filtering of JSON data on FPGAs
Design, Automation and Test in Europe Conference (DATE) (Antwerpen, 14. März 2022 - 23. März 2022)
In: Proceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe 2022
DOI: 10.23919/DATE54114.2022.9774696
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Hahn T., Wildermann S., Teich J.:
Auto-Tuning of Raw Filters for FPGAs
International Conference on Field-Programmable Logic and Applications (FPL) (Belfast, United Kingdom, 29. August 2022 - 2. September 2022)
In: IEEE Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications 2022
DOI: 10.1109/FPL57034.2022.00036
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Hannig F., Derrien S.:
Special Issue on Applied Reconfigurable Computing
In: Journal of Signal Processing Systems (2022)
ISSN: 1939-8018
DOI: 10.1007/s11265-022-01806-y
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Heidorn C., Meyerhöfer N., Schinabeck C., Hannig F., Teich J.:
Hardware-Aware Evolutionary Filter Pruning
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXII) (Pythagoreio, Samos, 3. Juli 2022 - 7. Juli 2022)
DOI: 10.1007/978-3-031-15074-6_18
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Heil A., Keszöcze O.:
Fast Approximate AIG-Based Synthesis
International Workshop on Boolean Problems (Bremen, 22. September 2022 - 23. September 2022)
BibTeX: Download
Keszöcze O.:
Approximate Computing
In: it - Information Technology (2022)
ISSN: 1611-2776
DOI: 10.1515/itit-2022-0027
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Keszöcze O.:
BDD-based Error Metric Analysis, Computation and Optimization
In: IEEE Access 10 (2022), S. 14013 - 14028
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2022.3140557
URL: https://ieeexplore.ieee.org/abstract/document/9669272
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Mishra A., Hannig F., Teich J., Sabih M.:
MOSP: Multi-Objective Sensitivity Pruning of Deep Neural Networks
The 13th International Green and Sustainable Computing Conference (IGSC) (Virtual, 24. Oktober 2022 - 27. Oktober 2022)
In: IEEE (Hrsg.): 2022 IEEE 13th International Green and Sustainable Computing Conference (IGSC), Pittsburgh, PA, USA: 2022
DOI: 10.1109/IGSC55832.2022.9969363
URL: https://ieeexplore.ieee.org/document/9969374
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Plagwitz P., Hannig F., Teich J.:
TRAC: Compilation-based Design of Transformer Accelerators for FPGAs
International Conference on Field Programmable Logic and Applications (FPL) (Belfast, United Kingdom, 29. August 2022 - 2. September 2022)
In: IEEE Proceedings of the 32nd International Conference on Field Programmable Logic and Applications 2022
DOI: 10.1109/FPL57034.2022.00015
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Pourmohseni B., Wildermann S., Smirnov F., Meyer P., Teich J.:
Task Migration Policy for Thermal-Aware Dynamic Performance Optimization in Many-Core Systems
In: IEEE Access (2022)
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2022.3162617
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Sabih M., Hannig F., Teich J.:
DyFiP: Explainable AI-based Dynamic Filter Pruning of Convolutional Neural Networks
2nd European Workshop on Machine Learning and Systems (EuroMLSys) (Rennes, France, 5. April 2022 - 8. April 2022)
In: Proceedings of the 2nd European Workshop on Machine Learning and Systems (EuroMLSys), New York, NY, United States: 2022
DOI: 10.1145/3517207.3526982
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Sixdenier PL., Wildermann S., Ziegler D., Teich J.:
SIDAM: A Design Space Exploration Framework for Multi-Sensor Embedded Systems Powered by Energy Harvesting
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXII) (Pythagoreio, Samos, 3. Juli 2022 - 7. Juli 2022)
In: Springer, Cham (Hrsg.): International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXII), Switzerland: 2022
DOI: 10.1007/978-3-031-15074-6
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Snelting G., Teich J., Fried A., Hannig F., Witterauf M.:
Compilation and Code Generation for Invasive Programs
In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing, FAU University Press, 2022, S. 309-333
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Sommer J., Özkan MA., Keszöcze O., Teich J.:
DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks
International Conference on Field Programmable Logic and Applications (FPL) (Belfast, United Kingdom, 29. August 2022 - 2. September 2022)
In: IEEE Proceedings of the 32nd International Conference on Field Programmable Logic and Applications 2022
DOI: 10.1109/FPL57034.2022.00035
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Sommer J., Özkan MA., Keszöcze O., Teich J.:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 (2022), S. 3767 - 3778
ISSN: 0278-0070
DOI: 10.1109/TCAD.2022.3197512
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Sommer J., Özkan MA., Keszöcze O., Teich J.:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Shanghai, 7. Oktober 2022 - 14. Oktober 2022)
DOI: 10.1109/tcad.2022.3197512
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Spieck J., Wildermann S., Teich J.:
On Transferring Application Mapping Knowledge Between Differing MPSoC Architectures
CODES+ISSS 2022 (Shanghai, 10. Oktober 2022 - 12. Oktober 2022)
In: CODES+ISSS 2022 2022
DOI: 10.1109/TCAD.2022.3197527
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Streit FJ.:
Techniques to Secure HW/SW-Programmable SoC Architectures for Edge Computing (Dissertation, 2022)
URL: https://opus4.kobv.de/opus4-fau/files/21375/dissertation_streit_final.pdf
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Teich J., Brand M., Hannig F., Heidorn C., Walter D., Witterauf M.:
Invasive Tightly-Coupled Processor Arrays
In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing, FAU University Press, 2022, S. 177-202
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Teich J., Esper K., Falk J., Pourmohseni B., Schwarzer T., Wildermann S.:
Basics of Invasive Computing
In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing, FAU University Press, 2022, S. 69-95
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Teich J., Henkel J., Herkersdorf A.:
Introduction to Invasive Computing
In: Jürgen Teich, Jörg Henkel, Andreas Herkersdorf (Hrsg.): Invasive Computing, FAU University Press, 2022, S. 1-66
ISBN: 978-3-96147-571-1
DOI: 10.25593/978-3-96147-571-1
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Trautmann J., Beckers A., Wouters L., Gierlichs B., Wildermann S., Verbauwhede I., Teich J.:
Semi-Automatic Locating of Cryptographic Operations in Side-Channel Traces
CHES 2022 (Leuven, Belgium, 18. September 2022 - 21. September 2022)
In: IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES) 2022
DOI: 10.46586/tches.v2022.i1.345-366
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Trautmann J., Patsiatzis N., Becher A., Teich J., Wildermann S.:
Real-Time Waveform Matching with a Digitizer at 10 GS/s
International Conference on Field Programmable Logic and Applications (FPL) (Belfast, United Kingdom, 29. August 2022 - 2. September 2022)
In: IEEE Proceedings of the 32nd International Conference on Field Programmable Logic and Applications 2022
DOI: 10.1109/FPL57034.2022.00025
URL: https://ieeexplore.ieee.org/document/10035208
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Trautmann J., Patsiatzis N., Becher A., Wildermann S., Teich J.:
Putting IMT to the Test: Revisiting and Expanding Interval Matching Techniques and their Calibration for SCA
ASHES 2022 (Los Angeles, CA, USA, 11. November 2022 - 11. November 2022)
In: Association for Computing Machinery (Hrsg.): Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security 2022
DOI: 10.1145/3560834.3563828
URL: https://dl.acm.org/doi/10.1145/3560834.3563828
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Trautmann J., Teich J., Wildermann S.:
Characterization of Side Channels on FPGA-based Off-The-Shelf Boards against Automated Attacks
30th IEEE International Symposium on Field-Programmable Custom Computing Machines (New York City, 15. Mai 2022 - 18. Mai 2022)
In: 30th IEEE International Symposium on Field-Programmable Custom Computing Machines 2022
DOI: 10.1109/FCCM53951.2022.9786190
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Wägele JW., Bodesheim P., Bourlat SJ., Denzler J., Diepenbroek M., Fonseca V., Frommolt KH., Geiger MF., Gemeinholzer B., Glöckner FO., Haucke T., Kirse A., Kölpin A., Kostadinov I., Kühl HS., Kurth F., Lasseck M., Liedke S., Losch F., Müller S., Petrovskaya N., Piotrowski K., Radig B., Scherber C., Schoppmann L., Schulz J., Steinhage V., Tschan GF., Vautz W., Velotto D., Weigend M., Wildermann S.:
Towards a multisensor station for automated biodiversity monitoring
In: Basic and Applied Ecology 59 (2022), S. 105-138
ISSN: 1439-1791
DOI: 10.1016/j.baae.2022.01.003
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Ah Sue J.:
Supervised Learning Grant Prediction for Cellular Mobile Device Power Savings (Dissertation, 2021)
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Alhaddad S., Förstner J., Groth S., Grünewald D., Grynko Y., Hannig F., Kenter T., Pfreundt FJ., Plessl C., Schotte M., Steinke T., Teich J., Weiser M., Wende F.:
HighPerMeshes -- A Domain-Specific Language for Numerical Algorithms on Unstructured Grids
18th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar) (Warsaw, 24. August 2020 - 24. August 2020)
In: Proceedings of the 18th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar) in Euro-Par 2020: Parallel Processing Workshops 2021
DOI: 10.1007/978-3-030-71593-9_15
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Alhaddad S., Förstner J., Groth S., Grünewald D., Grynko Y., Hannig F., Kenter T., Pfreundt FJ., Plessl C., Schotte M., Steinke T., Teich J., Weiser M., Wende F.:
The HighPerMeshes Framework for Numerical Algorithms on Unstructured Grids
In: Concurrency and Computation-Practice & Experience (2021)
ISSN: 1532-0626
DOI: 10.1002/cpe.6616
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Beena Gopalakrishnan Nair L., Becher A., Wildermann S., Meyer-Wegener K., Teich J.:
Speculative Dynamic Reconfiguration and Table Prefetching Using Query Look-Ahead in the ReProVide Near-Data-Processing System
In: Datenbank-Spektrum (2021)
ISSN: 1618-2162
DOI: 10.1007/s13222-020-00363-7
URL: https://rd.springer.com/article/10.1007/s13222-020-00363-7
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Bosio A., O'Connor I., Traiola M., Echavarria Gutiérrez JA., Teich J., Abdullah Hanif M., Shafique M., Hamdioui S., Deveautour B., Girard P., Virazel A., Bertels K.:
Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*
IEEE European Test Symposium (ETS) (Virtual Conference, 24. Mai 2021 - 28. Mai 2021)
In: Proceedings of the 26th IEEE European Test Symposium (ETS) 2021
DOI: 10.1109/ETS50041.2021.9465409
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Brand P., Falk J., Ah Sue J., Brendel J., Hasholzner R., Teich J.:
Adaptive Predictive Power Management for Mobile LTE Devices
In: IEEE Transactions on Mobile Computing 20 (2021), S. 2518-2535
ISSN: 1536-1233
DOI: 10.1109/TMC.2020.2988651
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Brand P., Falk J., Maier T., Teich J.:
Simulating Realistic IoT Network Traffic Using Similarity-based DSE
International Conference on Computational Science and Computational Intelligence (CSCI) (Las Vegas, NV)
In: 2021 International Conference on Computational Science and Computational Intelligence (CSCI), New York: 2021
DOI: 10.1109/CSCI54926.2021.00276
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Brand P., Falk J., Potwigin E., Teich J.:
Multi-Step Ahead Grant Prediction for Dynamic Power Management in Cellular Modems
2021 International Symposium on Networks, Computers and Communications (ISNCC 2021) (Canadian University, Citywalk, Dubai, 31. Oktober 2021 - 2. November 2021)
In: IEEE (Hrsg.): Proceedings of the 2021 International Symposium on Networks, Computers and Communications (ISNCC 2021) 2021
DOI: 10.1109/ISNCC52172.2021.9615819
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Derrien S., Hannig F., Diniz PC., Chillet D.:
Applied Reconfigurable Computing. Architectures, Tools, and Applications
17th International Symposium on Applied Reconfigurable Computing 2021 (Virtual Event, 29. Juni 2021 - 30. Juni 2021)
In: Applied Reconfigurable Computing. Architectures, Tools, and Applications 2021
DOI: 10.1007/978-3-030-79025-7
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Khosravi F., Becher A., Teich J.:
On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
(2021)
URL: http://arxiv.org/abs/2105.05588
BibTeX: Download
(online publication)
Echavarria Gutiérrez JA., Wildermann S., Teich J.:
Approximate Logic Synthesis of Very Large Boolean Networks
Design, Automation and Test in Europe, DATE 2021, February 1-5, 2021 (Alpexpo, Grenoble, 1. Februar 2021 - 5. Februar 2021)
In: Design, Automation and Test in Europe, DATE 2021 2021
DOI: 10.23919/date51398.2021.9473952
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Esper K., Wildermann S., Teich J.:
A Comparative Evaluation of Latency-Aware Energy Optimization Approaches in Many-Core Systems
Workshop on Next Generation Real-Time Embedded Systems (NG-RES) (Budapest, 20. Januar 2021 - 20. Januar 2021)
In: Proceedings of the Workshop on Next Generation Real-Time Embedded Systems (NG-RES), OASICS Vol. 87 2021
DOI: 10.4230/OASIcs.NG-RES.2021.1
URL: https://drops.dagstuhl.de/opus/volltexte/2021/13477
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Esper K., Wildermann S., Teich J.:
Enforcement FSMs - Specification and Verification of Non-Functional Properties of Program Executions on MPSoCs
19th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE'21) (Beijing, 20. November 2021 - 22. November 2021)
In: Proceedings of the 19th ACM-IEEE International Conference on Formal Methods and Models for System Design, New York, NY, USA: 2021
DOI: 10.1145/3487212.3487348
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Groth S., Teich J., Hannig F.:
Efficient Application of Tensor Core Units for Convolving Images
24th International Workshop on Software and Compilers for Embedded Systems (Eindhoven (NL), 1. November 2021 - 2. November 2021)
In: Proceedings of the 24th International Workshop on Software and Compilers for Embedded Systems 2021
DOI: 10.1145/3493229.3493305
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Guillouët Y., Keszöcze O., Sill Torres F.:
Extensive resilience analysis of function models of complex systems
Resilience Week (Washington, DC, 18. Oktober 2021 - 21. Oktober 2021)
DOI: 10.1109/rws52686.2021.9611802
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Hannig F., Koch D.:
Introduction to the Special Issue on Application-Specific Systems, Architectures and Processors
In: Journal of Signal Processing Systems (2021)
ISSN: 1939-8018
DOI: 10.1007/s11265-021-01708-5
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Hannig F., Meloni P., Spallanzani M., Ziegler M. (Hrsg.):
Proceedings of the DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA 2021)
2021
Open Access: http://arxiv.org/html/2102.00818
URL: http://arxiv.org/abs/2102.00818
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Hannig F., Teich J.:
Open Source Hardware
In: IEEE Computer 54 (2021), S. 111-115
ISSN: 0018-9162
DOI: 10.1109/MC.2021.3099046
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Heidorn C., Walter D., Candir YE., Hannig F., Teich J.:
Hand Sign Recognition via Deep Learning on Tightly Coupled Processor Arrays
31st International Conference on Field Programmable Logic and Applications (FPL) (Virtual Conference, 30. August 2021 - 3. September 2021)
In: Proceedings of the 31st International Conference on Field Programmable Logic and Applications (FPL) 2021
DOI: 10.1109/FPL53798.2021.00079
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Keszöcze O., Brand M., Witterauf M., Heidorn C., Teich J.:
Aarith: An Arbitrary Precision Number Library
ACM/SIGAPP Symposium On Applied Computing (virtual conference, 22. März 2021 - 26. März 2021)
DOI: 10.1145/3412841.3442085
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Keszöcze O., Kießling M.:
Approximate Computing Extensions for the Clash HDL Compiler
Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (virtuelle Konferenz, 18. März 2021 - 19. März 2021)
BibTeX: Download
Keszöcze O., Mohammadzadeh N., Wille R.:
Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum Architectures
Design, Automation and Test in Europe (virtual conference, 1. Februar 2021 - 5. November 2020)
DOI: 10.23919/date51398.2021.9474188
URL: https://www.date-conference.com/
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Khosravi F., Raß A., Teich J.:
Efficient Computation of Probabilistic Dominance in Multi-objective Optimization
In: ACM Transactions on Evolutionary Learning and Optimization 1 (2021), S. 1-26
ISSN: 2688-299X
DOI: 10.1145/3469801
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Letras M., Falk J., Teich J.:
Decision Tree-based Throughput Estimation to Accelerate Design Space Exploration for Multi-Core Applications
24. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (München, 18. März 2021 - 19. März 2021)
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Lippold D., Kergaßner A., Burkhardt C., Kergaßner M., Loos J., Nistler S., Steinmann P., Budday D., Budday S.:
Spatiotemporal modeling of first and second wave outbreak dynamics of COVID‐19 in Germany
In: Biomechanics and Modeling in Mechanobiology (2021)
ISSN: 1617-7959
DOI: 10.1007/s10237-021-01520-x
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Mohammadzadeh N., Wille R., Keszöcze O.:
Efficient One-Pass Synthesis for Digital Microfluidic Biochips
In: ACM Transactions on Design Automation of Electronic Systems (2021)
ISSN: 1084-4309
DOI: 10.1145/3446880
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Muradi M.:
Heuristische Algorithmen zur automatischen Generierung von prozesszeitoptimierten Roboterprogrammen im Bereich von Multi-Robotersystemen (Dissertation, 2021)
URL: https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-159014
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Mühlenthaler M., Raß A., Schmitt M., Wanka R.:
Exact Markov chain-based runtime analysis of a discrete particle swarm optimization algorithm on sorting and OneMax
In: Natural Computing (2021)
ISSN: 1567-7818
DOI: 10.1007/s11047-021-09856-0
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Plagwitz P., Hannig F., Ströbel M., Strohmeyer C., Teich J.:
A Safari through FPGA-based Neural Network Compilation and Design Automation Flows
29th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) (Virtual Conference, 9. Mai 2021 - 12. Mai 2021)
In: Proceedings of the 29th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) 2021
DOI: 10.1109/FCCM51124.2021.00010
URL: https://ieeexplore.ieee.org/document/9444092
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Pourmohseni B.:
System-Level Mapping, Analysis, and Management of Real-Time Applications in Many-Core Systems (Dissertation, 2021)
URL: https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-178822
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Qiao B.:
System-Level Optimization and Code Generation for Graphics Processors using a Domain-Specific Language (Dissertation, 2021)
URL: https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-179475
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Qiao B., Teich J., Hannig F.:
An Efficient Approach for Image Border Handling on GPUs via Iteration Space Partitioning
2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) (Portland, OR, 17. Mai 2021 - 21. Mai 2021)
In: Proceedings of the 2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) 2021
DOI: 10.1109/IPDPSW52791.2021.00067
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Sabih M., Hannig F., Teich J.:
Fault-Tolerant Low-Precision DNNs using Explainable AI
Workshop on Dependable and Secure Machine Learning (DSML) (Virtual Workshop, 21. Juni 2021 - 24. Juni 2021)
In: 2021 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W) 2021
DOI: 10.1109/DSN-W52860.2021.00036
URL: https://ieeexplore.ieee.org/document/9502445/
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Schlumberger J., Wildermann S., Teich J.:
CORSICA: A Framework for Conducting Real-World Side-Channel Analysis
In: IEEE (Hrsg.): 2nd IFIP NTMS Workshop on CyberSecurity on Hardware 2021 (CyberSECHARD'21), 2021, S. 1-5
DOI: 10.1109/NTMS49979.2021.9432644
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Schuster A., Heidorn C., Brand M., Keszöcze O., Teich J.:
Design Space Exploration of Time, Energy, and Error Rate Trade-oﬀs for CNNs using Accuracy-Programmable Instruction Set Processors
2nd International Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM) (Virtual Event, 13. September 2021 - 17. September 2021)
In: Springer, Cham (Hrsg.): Joint European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECML PKDD 2021), Switzerland: 2021
DOI: 10.1007/978-3-030-93736-2_29
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Sixdenier PL.:
Towards an Autonomous, Power-Efficient Base Station for Sensor Data Collection
2nd IEEE International Conference on Autonomic Computing and Self-Organizing Systems, ACSOS 2021
In: 2nd IEEE International Conference on Autonomic Computing and Self-Organizing Systems Companion, ACSOS-C 2021 2021
DOI: 10.1109/ACSOS-C52956.2021.00083
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Smirnov F., Pourmohseni B., Fahringer T.:
Apollo: Modular and Distributed Runtime System for Serverless Function Compositions on Cloud, Edge, and IoT Resources
1st Workshop on High Performance Serverless Computing, HiPS 2021 - Co-located with HPDC 2021 (Virtual, Online, SWE, 25. Juni 2021)
In: HiPS 2021 - Proceedings of the 1st Workshop on High Performance Serverless Computing, co-located with HPDC 2021 2021
DOI: 10.1145/3452413.3464793
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Smirnov F., Pourmohseni B., Glaß M., Teich J.:
Efficient Symbolic Routing Encoding for In-vehicle Network Optimization
In: Smart Cities, Green Technologies and Intelligent Transport Systems, Springer, 2021, S. 173 - 199
ISBN: 978-3-030-68028-2
DOI: 10.1007/978-3-030-68028-2_9
URL: https://link.springer.com/chapter/10.1007/978-3-030-68028-2_9
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Spieck J., Wildermann S., Teich J.:
Domain-Adaptive Soft Real-Time Hybrid Application Mapping for MPSoCs
3rd ACM/IEEE Workshop on Machine Learning for CAD (MLCAD) (North Carolina State University, Raleigh, NC, USA & Online, 31. August 2021 - 2. September 2021)
In: 3rd ACM/IEEE Workshop on Machine Learning for CAD (MLCAD) 2021
DOI: 10.1109/MLCAD52597.2021.9531269
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Streit FJ., Krüger P., Becher A., Schlumberger J., Wildermann S., Teich J.:
CHOICE – A Tunable PUF-Design for FPGAs
International Conference on Field-Programmable Logic and Applications (FPL) (Dresden, Germany, 30. August 2021 - 3. September 2021)
In: IEEE Proceedings of the 31th International Conference on Field Programmable Logic and Applications 2021
DOI: 10.1109/FPL53798.2021.00015
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Streit FJ., Krüger P., Becher A., Wildermann S., Teich J.:
Design and Evaluation of a Tunable PUF Architecture for FPGAs
In: ACM Transactions on Reconfigurable Technology and Systems 15 (2021), S. 1-27
ISSN: 1936-7406
DOI: 10.1145/3491237
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Streit FJ., Krüger P., Becher A., Wildermann S., Teich J.:
Design and Evaluation of a Tunable PUF Architecture for FPGAs
International Conference on Field-Programmable Technology (FPT) (Auckland, New Zealand, 6. Dezember 2021 - 10. Dezember 2021)
In: IEEE Proceedings of the 20th International Conference on Field-Programmable Technology 2021
DOI: 10.1109/ICFPT52863.2021
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Streit FJ., Wildermann S., Pschyklenk M., Teich J.:
Providing Tamper-Secure SoC Updates through Reconfigurable Hardware
International Symposium on Applied Reconfigurable Computing (ARC) (Rennes, France, 29. Juni 2021 - 1. Juli 2021)
In: Springer Proceedings of the 17th International Symposium on Applied Reconfigurable Computing 2021
DOI: 10.1007/978-3-030-79025-7_17
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Traiola M., Echavarria Gutiérrez JA., Bosio A., Teich J., O'Connor I.:
Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits
International Conference On Computer Aided Design (Virtual conference, 1. November 2021 - 4. November 2021)
In: Proceedings of the International Conference on Computer-Aided Design, ICCAD 2021
DOI: 10.1109/iccad51958.2021.9643561
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Walter D., Teich J.:
LION: Real-Time I/O Transfer Control for Massively Parallel Processor Arrays
19th ACM-IEEE International Conference on Formal Methods and Models for System Design (Beijing, China, 20. November 2021 - 22. November 2021)
In: Proceedings of the 19th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) 2021
DOI: 10.1145/3487212.3487349
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Witterauf M.:
A Compiler for Symbolic Code Generation for Tightly Coupled Processor Arrays (Dissertation, 2021)
URL: https://opus4.kobv.de/opus4-fau/files/17754/MichaelWitteraufDissertation.pdf
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Witterauf M., Walter D., Hannig F., Teich J.:
Symbolic Loop Compilation for Tightly Coupled Processor Arrays
In: ACM Transactions on Embedded Computing Systems (2021)
ISSN: 1539-9087
DOI: 10.1145/3466897
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Özkan MA., Ok B., Qiao B., Teich J., Hannig F.:
HipaccVX: Wedding of OpenVX and DSL-based Code Generation
In: Journal of Real-Time Image Processing 18 (2021), S. 765 - 777
ISSN: 1861-8200
DOI: 10.1007/s11554-020-01015-5
URL: http://link.springer.com/article/10.1007/s11554-020-01015-5
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Aliee H., Glaß M., Khosravi F., Teich J.:
Uncertainty-Aware Compositional System-Level Reliability Analysis
In: Henkel, Jörg, Dutt, Nikil (Hrsg.): Dependable Embedded Systems, 2020
ISBN: 978-3-030-52017-5
DOI: 10.1007/978-3-030-52017-5_19
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Arvind TKR., Brand M., Heidorn C., Boppu S., Hannig F., Teich J.:
Hardware Implementation of Hyperbolic Tangent Activation Function for Floating Point Formats
24th International Symposium on VLSI Design and Test (VDAT) (Bhubaneswar, 23. Juli 2020 - 25. Juli 2020)
In: Proceedings of the 24th International Symposium on VLSI Design and Test (VDAT) 2020
DOI: 10.1109/VDAT50263.2020.9190305
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Bassimir B., Schmitt M., Wanka R.:
Self-adaptive potential-based stopping criteria for Particle Swarm Optimization with forced moves
In: Swarm Intelligence (2020)
ISSN: 1935-3812
DOI: 10.1007/s11721-020-00185-z
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Beena Gopalakrishnan Nair L., Becher A., Meyer-Wegener K.:
The ReProVide Query-Sequence Optimization in a Hardware-Accelerated DBMS
16th International Workshop on Data Management on New Hardware Held with ACM SIGMOD/PODS 2020 (Portland, Oregon USA, 15. Juni 2020 - 15. Juni 2020)
In: DaMoN '20: Proceedings of the 16th International Workshop on Data Management on New Hardware 2020
DOI: 10.1145/3399666.3399926
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Beena Gopalakrishnan Nair L., Becher A., Meyer-Wegener K., Wildermann S., Teich J.:
SQL Query Processing Using an Integrated FPGA-based Near-Data Accelerator in ReProVide
23rd International Conference on Extending Database Technology (Copenhagen, 30. März 2020 - 2. April 2020)
In: Proceedings of EDBT 2020
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Brand M., Witterauf M., Bosio A., Teich J.:
Anytime Floating-Point Addition and Multiplication – Concepts and Implementations
Conference on Application-specific Systems, Architectures and Processors (ASAP 2020) (Manchester, U.K., 6. Juli 2020 - 8. Juli 2020)
In: Proceedings of the 31st IEEE International Conference on Application-specific Systems, Architectures and Processors 2020
DOI: 10.1109/ASAP49362.2020.00034
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Brand P., Sabih M., Falk J., Ah Sue J., Teich J.:
Clustering-Based Scenario-Aware LTE Grant Prediction
IEEE Wireless Communications and Networking Conference (WCNC2020) (Seoul, 25. Mai 2020 - 28. Mai 2020)
In: IEEE (Hrsg.): Proceedings of the 2020 IEEE Wireless Communications and Networking Conference (WCNC) 2020
DOI: 10.1109/WCNC45663.2020.9120789
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Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Teich J.:
Probabilistic Error Propagation through Approximated Boolean Networks
57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. Juli 2020 - 23. Juli 2020)
In: Proceedings of the 57th Annual Design Automation Conference 2020
DOI: 10.1109/dac18072.2020.9218536
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Echavarria Gutiérrez JA., Wildermann S., Khosravi F., Teich J.:
An Approximate Sequential Multiplier with Segmented Carry Chain and Variable Accuracy
AxC20: 5th Workshop on Approximate Computing (San Francisco, CA, 19. Juli 2020 - 24. Juli 2020)
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Fickenscher J.:
Performance Modeling and Parallelization of Environment Perception and Path Planning Algorithms for Heterogeneous Advanced Driver Assistance System Architectures (Dissertation, 2020)
BibTeX: Download
Groth S., Grünewald D., Teich J., Hannig F.:
A Runtime System for Finite Element Methods in a Partitioned Global Address Space
ACM International Conference on Computing Frontiers 2020 (Catania, Sicily, Italy, 11. Mai 2020 - 13. Mai 2020)
In: Proceedings of the 17th ACM International Conference on Computing Frontiers (CF) 2020
DOI: 10.1145/3387902.3392628
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Hannig F., Navaridas J., Koch D., Abdelhadi A. (Hrsg.):
Proceedings of the 31st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)
2020
ISBN: 978-1-7281-7147-0
DOI: 10.1109/ASAP49362.2020
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Heidorn C., Hannig F., Teich J.:
Design Space Exploration for Layer-parallel Execution of Convolutional Neural Networks on CGRAs
International Workshop on Software and Compilers for Embedded Systems (SCOPES) (St. Goar, 25. Mai 2020 - 26. Mai 2020)
In: Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2020
DOI: 10.1145/3378678.3391878
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Herkersdorf A., Engel M., Glaß M., Henkel J., Kleeberger VB., Kühn JM., Marwedel P., Mueller-Gritschneder D., Nassif SR., Rehman S., Rosenstiel W., Schlichtmann U., Shafique M., Teich J., Wehn N., Weis C.:
RAP Model - Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience
In: Henkel, Jörg, Dutt, Nikil (Hrsg.): Dependable Embedded Systems, 2020
ISBN: 978-3-030-52017-5
DOI: 10.1007/978-3-030-52017-5_1
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Kergaßner A., Burkhardt C., Lippold D., Kergaßner M., Pflug L., Budday D., Steinmann P., Budday S.:
Memory-based meso-scale modeling of Covid-19
In: Computational Mechanics (2020)
ISSN: 0178-7675
DOI: 10.1007/s00466-020-01883-5
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Keszöcze O., Keiner B., Richter M., Antpöhler G., Wille R.:
(Semi)Automatic Translation of Legal Regulations to Formal Representations: Expanding the Horizon of EDA Applications
In: Mathias Soeken, Rolf Drechsler (Hrsg.): Natural Language Processing for Electronic Design Automation, Springer, 2020
ISBN: 978-3-030-52271-1
DOI: 10.1007/978-3-030-52273-5_1
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Keszöcze O., König M., Brand M., Teich J.:
Error Analysis for Loop Programs using Anytime Instructions in Approximate Computing
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Stuttgart, 19. März 2020 - 20. März 2020)
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Keszöcze O., Schmitz K., Schloeter J., Drechsler R.:
Improving SAT Solving Using Monte Carlo Tree Search-based Clause Learning
In: Rolf Drechsler, Mathias Soeken (Hrsg.): Advanced Boolean Techniques - Selected Papers from the 13th International Workshop on Boolean Problems, Springer International Publishing, 2020
ISBN: 978-3-030-20322-1
DOI: 10.1007/978-3-030-20323-8
URL: https://www.springerprofessional.de/advanced-boolean-techniques/16907760
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Keszöcze O., Wille R., Drechsler R.:
One-pass Synthesis for Digital Microfluidic Biochips: A Survey
International Symposium on Devices, Circuits and Systems (Indian Institute of Engineering Science and Technology, Shibpur, Kolkata, 4. März 2020 - 6. März 2020)
DOI: 10.1109/ISDCS49393.2020.9263007
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Lengauer C., Apel S., Bolten M., Chiba S., Rüde U., Teich J., Größlinger A., Hannig F., Köstler H., Claus L., Grebhahn A., Groth S., Kronawitter S., Kuckuk S., Rittich H., Schmitt C., Schmitt J.:
ExaStencils: Advanced multigrid solver generation
In: Hans-Joachim Bungartz, Severin Reiz, Benjamin Uekermann, Philipp Neumann, Wolfgang E. Nagel (Hrsg.): Lecture notes in computational science and engineering, Cham: Springer, 2020, S. 405-452 (Software for Exascale Computing SPPEXA 2016 – 2019, Bd.136)
ISBN: 978-3-030-47955-8
DOI: 10.1007/978-3-030-47956-5
URL: https://library.oapen.org/bitstream/handle/20.500.12657/41289/2020_Book_SoftwareForExascaleComputing-S.pdf?sequence=1#page=411
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Lengauer C., Apel S., Bolten M., Chiba S., Rüde U., Teich J., Größlinger A., Hannig F., Köstler H., Claus L., Grebhahn A., Groth S., Kronawitter S., Kuckuk S., Rittich H., Schmitt C., Schmitt J.:
ExaStencils – Advanced Multigrid Solver Generation
In: Hans-Joachim Bungartz, Severin Reiz, Philipp Neumann, Benjamin Uekermann, Wolfgang Nagel (Hrsg.): Software for Exascale Computing – SPPEXA 2016-2019, Springer, 2020, S. 405-452 (Lecture Notes in Computer Science and Engineering, Bd.136)
ISBN: 978-3-030-47955-8
DOI: 10.1007/978-3-030-47956-5_14
URL: https://www12.cs.fau.de/downloads/hannig/publications/ExaStencils_Advanced_Multigrid_Solver_Generation.pdf
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Letras M., Bustio L., Cumplido R., Hernández-León R., Feregrino C.:
On the design of hardware architectures for parallel frequent itemsets mining
In: Expert Systems With Applications 157 (2020)
ISSN: 0957-4174
DOI: 10.1016/j.eswa.2020.113440.
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Letras M., Falk J., Schwarzer T., Teich J.:
Multi-objective Optimization of Mapping Dataflow Applications to MPSoCs Using a Hybrid Evaluation Combining Analytic Models and Measurements
In: ACM Transactions on Design Automation of Electronic Systems 26 (2020), S. 1–33
ISSN: 1084-4309
DOI: 10.1145/3431814
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Lukac M., Nursultan S., Krylov G., Keszöcze O.:
Geometric Refactoring of Quantum and Reversible Circuits: Quantum Layout
Euromicro Conference on Digital System Design
DOI: 10.1109/dsd51259.2020.00074
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Lukac M., Nursultan S., Krylov G., Keszöcze O.:
Refactoring of Quantum and Reversible Circuits
International Workshop on Quantum Compilation (Cambridge, 23. September 2020 - 24. September 2020)
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Mattauch S., Lohmann K., Hannig F., Lohmann D., Teich J.:
A Bibliometric Approach for Detecting the Gender Gap in Computer Science
In: Communications of the ACM 63 (2020), S. 39-45
ISSN: 0001-0782
DOI: 10.1145/3376901
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Muradi M., Wanka R.:
Processing Time Optimization for Robot Applications
6th International Conference on Control, Automation and Robotics (ICCAR) (Singapore, 20. April 2020 - 23. April 2020)
In: IEEE (Hrsg.): Proc. 6th International Conference on Control, Automation and Robotics (ICCAR) 2020
DOI: 10.1109/ICCAR49639.2020.9108089
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Muradi M., Wanka R.:
Sample-Based Motion Planning for Multi-Robot Systems
6th International Conference on Control, Automation and Robotics (ICCAR) (Singapore, 20. April 2020 - 23. April 2020)
In: IEEE (Hrsg.): Proc. 6th International Conference on Control, Automation and Robotics (ICCAR) 2020
DOI: 10.1109/ICCAR49639.2020.9108020
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Pourmohseni B., Glaß M., Henkel J., Khdr H., Rapp M., Richthammer V., Schwarzer T., Smirnov F., Spieck J., Teich J., Weichslgartner A., Wildermann S.:
Hybrid Application Mapping for Composable Many-Core Systems: Overview and Future Perspective
In: Journal of Low Power Electronics and Applications 10 (2020), S. 1-37
ISSN: 2079-9268
DOI: 10.3390/jlpea10040038
URL: https://www.mdpi.com/892470
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Pourmohseni B., Smirnov F., Wildermann S., Teich J.:
Real-Time Task Migration for Dynamic Resource Management in Many-Core Systems
Workshop on Next Generation Real-Time Embedded Systems (NG-RES) (Bologna, 21. Januar 2020)
In: Proceedings of the Workshop on Next Generation Real-Time Embedded Systems (NG-RES) 2020
DOI: 10.4230/OASIcs.NG-RES.2020.5
URL: https://drops.dagstuhl.de/opus/volltexte/2020/11781/
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Pourmohseni B., Teich J.:
System-Level Mapping, Analysis, and Management of Real-Time Applications in Many-Core Systems
PhD Forum at the Design, Automation, and Test in Europe (DATE) Conference and Exhibition (Grenoble, France, 9. März 2020 - 13. März 2020)
URL: https://www12.cs.fau.de/downloads/pourmohseni/pub/phdForumDATE20.pdf
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Qiao B., Reiche O., Teich J., Hannig F.:
Unveiling Kernel Concurrency in Multiresolution Filters on GPUs with an Image Processing DSL
13th Workshop on General Purpose Processing Using GPU (GPGPU) (San Diego, CA, USA, 23. Februar 2020 - 23. Februar 2020)
In: Proceedings of the 13th Workshop on General Purpose Processing Using GPU (GPGPU) 2020
DOI: 10.1145/3366428.3380773
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Qiao B., Reiche O., Özkan MA., Teich J., Hannig F.:
Efficient Parallel Reduction on GPUs with Hipacc
23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar, 25. Mai 2020 - 26. Mai 2020)
In: Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2020
DOI: 10.1145/3378678.3391885
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Qiao B., Özkan MA., Teich J., Hannig F.:
The Best of Both Worlds: Combining CUDA Graph with an Image Processing DSL
57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. Juli 2020 - 23. Juli 2020)
In: Proceedings of the 57th Annual Design Automation Conference (DAC) 2020
DOI: 10.1109/DAC18072.2020.9218531
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Raß A.:
High Precision Particle Swarm Optimization Algorithm (HiPPSO)
In: Journal of Open Research Software 8 (2020), S. 4
ISSN: 2049-9647
DOI: 10.5334/jors.282
URL: https://openresearchsoftware.metajnl.com/articles/10.5334/jors.282/
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Sabih M., Hannig F., Teich J.:
Utilizing Explainable AI for Quantization and Pruning of Deep Neural Networks
(2020)
Open Access: https://arxiv.org/pdf/2008.09072
URL: https://arxiv.org/abs/2008.09072
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(online publication)
Schwarzer T.:
System-level Mapping of Dataflow Applications onto MPSoCs (Dissertation, 2020)
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Simon B., Falk J., Megow N., Teich J.:
Energy Minimization in DAG Scheduling on MPSoCs at Run-Time: Theory and Practice
Workshop on Next Generation Real-Time Embedded Systems (Bologna, 21. Januar 2020)
In: Proceedings of the Workshop on Next Generation Real-Time Embedded Systems (NG-RES) 2020
DOI: 10.4230/OASIcs.NG-RES.2020.2
URL: https://drops.dagstuhl.de/opus/volltexte/2020/11778/
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Smirnov F., Pourmohseni B., Teich J.:
Using Learning Classifier Systems for the DSE of Adaptive Embedded Systems
Design, Automation and Test in Europe Conference and Exhibition (DATE) (Grenoble)
In: PROCEEDINGS OF THE 2020 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2020), NEW YORK: 2020
DOI: 10.23919/date48585.2020.9116383
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Smirnov F., Pourmohseni B., Teich J.:
Using Learning Classifier Systems for the DSE of Dynamically Adaptable Embedded Systems
Design, Automation and Test in Europe Conference (Grenoble, 9. März 2020 - 13. März 2020)
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Spieck J., Wildermann S., Teich J.:
Run-Time Scenario-Based MPSoC Mapping Reconfiguration Using Machine Learning Models
1st ACM/IEEE Workshop on Machine Learning for CAD (MLCAD) (Canmore, Alberta, Canada, 3. September 2019 - 4. September 2019)
In: Post-workshop proceedings of 2019 ACM/IEEE 1st Workshop on Machine Learning for CAD 2020
DOI: 10.1109/MLCAD48534.2019.9142060
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Spieck J., Wildermann S., Teich J.:
Scenario-Based Soft Real-Time Hybrid Application Mapping for MPSoCs
57th Annual Design Automation Conference (DAC) (San Francisco, 19. Juli 2020 - 23. Juli 2020)
In: Proceedings of the 57th Annual Design Automation Conference (DAC) 2020
DOI: 10.1109/DAC18072.2020.9218537
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Streit FJ., Fritz F., Becher A., Wildermann S., Werner S., Schmidt-Korth M., Pschyklenk M., Teich J.:
Secure Boot from Non-Volatile Memory for Programmable SoC-Architectures
International Symposium on Hardware Oriented Security and Trust (HOST) (San José, USA, 7. Dezember 2020 - 11. Dezember 2020)
In: IEEE Proceedings of the 13th International Symposium on Hardware Oriented Security and Trust 2020
DOI: 10.1109/HOST45689.2020.9300126
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Streit FJ., Wituschek S., Pschyklenk M., Becher A., Lechner M., Wildermann S., Pitz I., Merklein M., Teich J.:
Data acquisition and control at the edge: a hardware/software-reconfigurable approach
In: Production Engineering 14 (2020), S. 365-371
ISSN: 0944-6524
DOI: 10.1007/s11740-020-00964-x
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Teich J., Mahmoody P., Pourmohseni B., Roloff S., Schröder-Preikschat W., Wildermann S.:
Run-Time Enforcement of Non-functional Program Properties on MPSoCs
In: Jian-Jia Chen (Hrsg.): A Journey of Embedded and Cyber-Physical Systems, Springer, 2020
ISBN: 978-3-030-47487-4
DOI: 10.1007/978-3-030-47487-4
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Teich J., Pourmohseni B., Keszöcze O., Spieck J., Wildermann S.:
Run-Time Enforcement of Non-Functional Application Requirements in Heterogeneous Many-Core Systems
Asia and South Pacific Design Automation Conference (ASP-DAC) (China National Convention Center, Beijing, China, 13. Januar 2020 - 16. Januar 2020)
DOI: 10.1109/ASP-DAC47756.2020.9045536
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Traiola M., Echavarria Gutiérrez JA., Bosio A., Teich J., O'Connor I.:
Design Space Exploration of an Approximation-Based Fully Reliable TMR Alternative
8th Prague Embedded Systems Workshop (Horoměřice, 6. November 2020 - 7. November 2020)
Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Design_Space_Exploration_of_an_Approximation-Based_Fully_Reliable_TMR_Alternative.pdf
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Walter D., Witterauf M., Teich J.:
Real-time Scheduling of I/O Transfers for Massively Parallel Processor Arrays
18th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2020 (Jaipur, India, 2. Dezember 2020 - 4. Dezember 2020)
In: Proceedings of the 18th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) 2020
DOI: 10.1109/MEMOCODE51338.2020.9315179
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Wang B., Glaß M., Falk J., Ahmed I., Teich J.:
Exploration of Power Domain Partitioning with Concurrent Task Mapping and Scheduling for Application-specific Multi-core SoCs
33rd International Conference on Architecture of Computing Systems (ARCS) (Aachen, 25. Mai 2020 - 28. Mai 2020)
In: In Proc. of the 33rd International Conference on Architecture of Computing Systems (ARCS) 2020
DOI: 10.1007/978-3-030-52794-5_12
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Wendler A., Keszöcze O.:
A fast BDD Minimization Framework for Approximate Computing
Design, Automation and Test in Europe (ALPEXPO, Grenoble, France, 9. März 2020 - 13. März 2020)
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Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Leißa R., Hack S., Teich J., Hannig F.:
AnyHLS: High-Level Synthesis with Partial Evaluation
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Hamburg, 20. September 2020 - 25. September 2020)
DOI: 10.1109/tcad.2020.3012172
URL: https://arxiv.org/pdf/2002.05796.pdf
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Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Leißa R., Hack S., Teich J., Hannig F.:
AnyHLS: High-Level Synthesis with Partial Evaluation
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (2020), S. 3202-3214
ISSN: 0278-0070
DOI: 10.1109/TCAD.2020.3012172
URL: https://arxiv.org/pdf/2002.05796.pdf
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