Die Arbeitsgruppe Approximate Computing (AC) forscht im Bereich des ungenauen Rechnens (engl. approximate computing). Hierbei werden Ungenauigkeiten oder gar Fehler in Berechnungen wissentlich in Kauf genommen, sofern sich die Berechnungen dann schneller ausführen lassen, sie weniger Energie verbrauchen oder kostengünstiger in Hardware realisiert werden können.

Die Grundlage ist die Erkenntnis, dass viele Anwendungen des täglichen Lebens Ungenauigkeiten in Berechnungen zu einem gewissen Grad tolerieren. Dazu gehören z.B. die Gebiete Computer Vision, Maschinelles Lernen, Multimedia, Big Data und Gaming. Gerade in diesen Bereichen sind approximierte Berechnungen oft völlig ausreichend aufgrund von Einschränkungen der menschlichen Wahrnehmung, Redundanz oder Rauschen in Eingangsdaten.

Die Arbeitsgruppe untersucht die Approximationsmöglichkeiten auf unterschiedlichen Abstraktionsebenen. So werden sowohl hoch-performante spezielle Schaltkreise zur Berechnung von Grundrechenarten als auch ganze Systeme zur Beschleunigung künstlicher neuronaler Netze entwickelt.

Publications:

2025

Hernandez Morales JJ., Hannig F., Teich J.:
A SIMD MAC RISC-V Extension with Approximate Multipliers for Accelerating CNN Inference in Tiny Embedded Devices
38th GI/ITG International Conference on Architecture of Computing Systems (Kiel, 22. April 2025 - 24. April 2025)
In: Sven Tomforde, Christian Krupitzer, Stephane Vialle, Estela Suarez, and Thilo Pionteck (ed.): Architecture of Computing Systems, 38th International Conference, ARCS 2025, Kiel, Germany, April 22–24, 2025, Proceedings 2025
DOI: 10.1007/978-3-032-03281-2_12
URL: https://link.springer.com/chapter/10.1007/978-3-032-03281-2_12
BibTeX: Download

2024

Brand M.:
Approximate and Reconfigurable Precision Instruction Set Processors for Tightly Coupled Processor Arrays (Dissertation, 2024)
DOI: 10.25593/open-fau-601
URL: https://open.fau.de/handle/openfau/31038
BibTeX: Download
Jungnitz N., Keszöcze O.:
SAS - A Framework for Symmetry-based Approximate Synthesis
Design Automation Conference (San Francisco, 23. Juni 2024 - 27. Juni 2024)
DOI: 10.1145/3649329.3658495
BibTeX: Download
Plagwitz P., Hannig F., Teich J., Keszöcze O.:
DSL-based SNN Accelerator Design using Chisel
27th Euromicro Conference Series on Digital System Design (DSD) (Paris, 27. August 2024 - 30. August 2024)
In: Proceedings of the 27th Euromicro Conference on Digital Systems Design (DSD) 2024
DOI: 10.1109/DSD64264.2024.00032
BibTeX: Download
Plagwitz P., Hannig F., Teich J., Keszöcze O.:
SNN vs. CNN Implementations on FPGAs: An Empirical Evaluation
20th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC) (Aveiro, 20. März 2024 - 22. März 2024)
In: Proceedings of the 20th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC) 2024
DOI: 10.1007/978-3-031-55673-9_1
BibTeX: Download
Plagwitz P., Hannig F., Teich J., Keszöcze O.:
Compiler-based Processor Network Generation for Neural Networks on FPGAs
27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) (Kaiserslautern, 14. Februar 2024 - 15. Februar 2024)
In: Proceedings of the 27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) 2024
BibTeX: Download

2023

Heil A., Keszöcze O.:
Fast Approximate AIG-Based Synthesis
In: Rolf Drechsler, Sebastian Huhn (ed.): Advanced Boolean Techniques, Springer, 2023, p. 17 -- 32
ISBN: 978-3-031-28915-6
DOI: 10.1007/978-3-031-28916-3
BibTeX: Download
Plagwitz P., Hannig F., Teich J., Keszöcze O.:
To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations
(2023)
Open Access: https://arxiv.org/abs/2306.12742
URL: https://arxiv.org/abs/2306.12742
BibTeX: Download
(online publication)
Pradhan C., Letras M., Teich J.:
Efficient Table-based Function Approximation on FPGAs using Interval Splitting and BRAM Instantiation
In: ACM Transactions on Embedded Computing Systems 22 (2023), p. 1-24
ISSN: 1539-9087
DOI: 10.1145/3580737
BibTeX: Download

2022

Brand M., Keszöcze O., Teich J.:
Precision- and Accuracy-Reconfigurable Processor Architectures—An Overview
In: IEEE Transactions on Circuits and Systems II: Express Briefs 69 (2022), p. 2661 - 2666
ISSN: 1057-7130
DOI: 10.1109/TCSII.2022.3173753
BibTeX: Download
Echavarria Gutiérrez JA.:
On the Approximation of Arithmetic Functions and Logic Snythesis of Approximate Very Large Boolean Networks (Dissertation, 2022)
URL: https://opus4.kobv.de/opus4-fau/files/20100/DissertationJorgeEchavarria.pdf
BibTeX: Download
Echavarria Gutiérrez JA., Keszöcze O., Teich J.:
Probability-based DSE of Approximated LUT-based FPGA Designs
15th IEEE Dallas Circuits and Systems Conference (Dallas, 17. Juni 2022 - 19. Juni 2022)
DOI: 10.1109/dcas53974.2022.9845591
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Khosravi F., Becher A., Teich J.:
Design and Error Analysis of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
In: it - Information Technology (2022)
ISSN: 1611-2776
DOI: 10.1515/itit-2021-0040
BibTeX: Download
Heil A., Keszöcze O.:
Fast Approximate AIG-Based Synthesis
International Workshop on Boolean Problems (Bremen, 22. September 2022 - 23. September 2022)
BibTeX: Download
Keszöcze O.:
BDD-based Error Metric Analysis, Computation and Optimization
In: IEEE Access 10 (2022), p. 14013 - 14028
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2022.3140557
URL: https://ieeexplore.ieee.org/abstract/document/9669272
BibTeX: Download
Sommer J., Özkan MA., Keszöcze O., Teich J.:
DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks
International Conference on Field Programmable Logic and Applications (FPL) (Belfast, United Kingdom, 29. August 2022 - 2. September 2022)
In: IEEE Proceedings of the 32nd International Conference on Field Programmable Logic and Applications 2022
DOI: 10.1109/FPL57034.2022.00035
BibTeX: Download
Sommer J., Özkan MA., Keszöcze O., Teich J.:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Shanghai, 7. Oktober 2022 - 14. Oktober 2022)
DOI: 10.1109/tcad.2022.3197512
BibTeX: Download
Sommer J., Özkan MA., Keszöcze O., Teich J.:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 (2022), p. 3767 - 3778
ISSN: 0278-0070
DOI: 10.1109/TCAD.2022.3197512
BibTeX: Download

2021

Bosio A., O'Connor I., Traiola M., Echavarria Gutiérrez JA., Teich J., Abdullah Hanif M., Shafique M., Hamdioui S., Deveautour B., Girard P., Virazel A., Bertels K.:
Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*
IEEE European Test Symposium (ETS) (Virtual Conference, 24. Mai 2021 - 28. Mai 2021)
In: Proceedings of the 26th IEEE European Test Symposium (ETS) 2021
DOI: 10.1109/ETS50041.2021.9465409
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Khosravi F., Becher A., Teich J.:
On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
(2021)
URL: http://arxiv.org/abs/2105.05588
BibTeX: Download
(online publication)
Echavarria Gutiérrez JA., Wildermann S., Teich J.:
Approximate Logic Synthesis of Very Large Boolean Networks
Design, Automation and Test in Europe, DATE 2021, February 1-5, 2021 (Alpexpo, Grenoble, 1. Februar 2021 - 5. Februar 2021)
In: Design, Automation and Test in Europe, DATE 2021 2021
DOI: 10.23919/date51398.2021.9473952
BibTeX: Download
Keszöcze O., Brand M., Witterauf M., Heidorn C., Teich J.:
Aarith: An Arbitrary Precision Number Library
ACM/SIGAPP Symposium On Applied Computing (virtual conference, 22. März 2021 - 26. März 2021)
DOI: 10.1145/3412841.3442085
BibTeX: Download
Keszöcze O., Kießling M.:
Approximate Computing Extensions for the Clash HDL Compiler
Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (virtuelle Konferenz, 18. März 2021 - 19. März 2021)
BibTeX: Download
Schuster A., Heidorn C., Brand M., Keszöcze O., Teich J.:
Design Space Exploration of Time, Energy, and Error Rate Trade-oﬀs for CNNs using Accuracy-Programmable Instruction Set Processors
2nd International Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM) (Virtual Event, 13. September 2021 - 17. September 2021)
In: Springer, Cham (ed.): Joint European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECML PKDD 2021), Switzerland: 2021
DOI: 10.1007/978-3-030-93736-2_29
BibTeX: Download
Traiola M., Echavarria Gutiérrez JA., Bosio A., Teich J., O'Connor I.:
Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits
International Conference On Computer Aided Design (Virtual conference, 1. November 2021 - 4. November 2021)
In: Proceedings of the International Conference on Computer-Aided Design, ICCAD 2021
DOI: 10.1109/iccad51958.2021.9643561
BibTeX: Download

2020

Brand M., Witterauf M., Bosio A., Teich J.:
Anytime Floating-Point Addition and Multiplication – Concepts and Implementations
Conference on Application-specific Systems, Architectures and Processors (ASAP 2020) (Manchester, U.K., 6. Juli 2020 - 8. Juli 2020)
In: Proceedings of the 31st IEEE International Conference on Application-specific Systems, Architectures and Processors 2020
DOI: 10.1109/ASAP49362.2020.00034
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Teich J.:
Probabilistic Error Propagation through Approximated Boolean Networks
57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. Juli 2020 - 23. Juli 2020)
In: Proceedings of the 57th Annual Design Automation Conference 2020
DOI: 10.1109/dac18072.2020.9218536
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Khosravi F., Teich J.:
An Approximate Sequential Multiplier with Segmented Carry Chain and Variable Accuracy
AxC20: 5th Workshop on Approximate Computing (San Francisco, CA, 19. Juli 2020 - 24. Juli 2020)
BibTeX: Download
Keszöcze O., König M., Brand M., Teich J.:
Error Analysis for Loop Programs using Anytime Instructions in Approximate Computing
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Stuttgart, 19. März 2020 - 20. März 2020)
BibTeX: Download
Traiola M., Echavarria Gutiérrez JA., Bosio A., Teich J., O'Connor I.:
Design Space Exploration of an Approximation-Based Fully Reliable TMR Alternative
8th Prague Embedded Systems Workshop (Horoměřice, 6. November 2020 - 7. November 2020)
Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Design_Space_Exploration_of_an_Approximation-Based_Fully_Reliable_TMR_Alternative.pdf
BibTeX: Download
Wendler A., Keszöcze O.:
A fast BDD Minimization Framework for Approximate Computing
Design, Automation and Test in Europe (ALPEXPO, Grenoble, France, 9. März 2020 - 13. März 2020)
BibTeX: Download

2018

Echavarria Gutiérrez JA., Schütz K., Becher A., Wildermann S., Teich J.:
Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs
AxC18: 3rd Workshop on Approximate Computing (Swissôtel Bremen, 31. Mai 2018 - 1. Juni 2018)
Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Evaluation_of_Approximate_Computing_Techniques_for_Power_Reduction_on_FPGAs.pdf
BibTeX: Download
Echavarria Gutiérrez JA., Schütz K., Becher A., Wildermann S., Teich J.:
Can Approximate Computing Reduce Power Consumption on FPGAs?
25th IEEE International Conference on Electronics Circuits and Systems (Bordeaux, 9. Dezember 2018 - 12. Dezember 2018)
In: Proceedings of IEEE International Conference on Electronics Circuits and Systems 2018
DOI: 10.1109/icecs.2018.8618062
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Teich J.:
AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs
International Conference on Field Programmable Technology (FPT 2018) (Naha, Okinawa, 10. Dezember 2018 - 14. Dezember 2018)
In: Proceedings of 2018 International Conference on Field Programmable Technology 2018
DOI: 10.1109/fpt.2018.00065
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Teich J.:
Design Space Exploration of Multi-output Logic Function Approximations
International Conference On Computer Aided Design (ICCAD 2018) (San Diego, CA, 5. November 2018 - 8. November 2018)
In: Proceedings of the International Conference On Computer Aided Design 2018
DOI: 10.1145/3240765.3240795
BibTeX: Download

2017

Echavarria Gutiérrez JA., Wildermann S., Potwigin E., Teich J.:
Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders
In: IEEE Embedded Systems Letters (2017), Article No.: 99
ISSN: 1943-0663
DOI: 10.1109/LES.2017.2760922
BibTeX: Download

2016

Becher A., Echavarria Gutiérrez JA., Ziener D., Wildermann S., Teich J.:
A LUT-Based Approximate Adder
24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016). (Washington DC, 1. Mai 2016 - 3. Mai 2016)
In: Proceedings of the 24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines 2016
DOI: 10.1109/FCCM.2016.16
BibTeX: Download
Echavarria Gutiérrez JA., Wildermann S., Becher A., Teich J., Ziener D.:
FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs
International Conference on Field Programmable Technology (FPT 2016) (Xi'an, 7. Dezember 2016 - 9. Dezember 2016)
In: Proceedings of 2016 International Conference on Field Programmable Technology 2016
DOI: 10.1109/FPT.2016.7929536
BibTeX: Download

2015

Becher A., Echavarria Gutiérrez JA., Ziener D., Teich J.:
Approximate Adder Structures on FPGAs
AxC15: 1st Workshop on Approximate Computing (Paderborn, Germany)
Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Approximate_Adder_Structures_on_FPGAs.pdf
BibTeX: Download

Aktuell laufende Projekte

Approximate Computing on FPGAs

NA³Os

Material

Sammlung approximierter PLA Schaltreise: AxPLA
Sammlung approximierter Addierer: FAU
Sammlung approximierter Multiplizierer: AxSM
Aarith: An Arbitrary Precision Number Library
ABO: BDD-based Error Metric Analysis, Computation and Optimization Framework

Approximate Computing