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27.03.2015: InvasIC-Seminar „Multi- and Many-Core Architectures – A Trip over a Bumpy Road“

Bild eines Seminarraumes mit Zuhörern und eines Vortragenden

Prof. Dr.-Ing. Jörg Nolte von der BTU Cottbus–Senftenberg wird im Rahmen der InvasIC-Vortragsreihe am 27.03.2015 zum Thema „Multi- and Many-Core Architectures – A Trip over a Bumpy Road“ sprechen.

Abstrakt
General purpose CPUs with dozens of computing cores are currently reaching the market. Some researchers even expect chips with thousands of computing cores to be available in the foreseeable future. In this talk we will discuss the architectures of some current multi- and many-core CPUs with an emphasis on understanding the hardware foundation of today“s parallel computing systems.
In particular we will concentrate on the memory hierarchy of these CPUs and the inherent cost of sharing in cache-coherent multi-core systems. Additionally, we will examine typical problems that system designers and application programmers have to solve when they try to utilize such hardware architectures effectively.

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