Jutta Pirkl

Jutta Pirkl, M. Sc.

Department Informatik (INF)
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Curriculum Vitæ

since May, 2016 Researcher at the Department of Computer Science 12 (Hardware/Software Co-Design)Friedrich-Alexander University Erlangen-Nürnberg, Erlangen, Germany
2013 – 2016 M. Sc. Information and Communication Technology, Friedrich-Alexander University Erlangen-Nürnberg, Erlangen, Germany
2010 – 2013 B. Sc. Business Administration and Engineering – Information and Communication Systems, Friedrich-Alexander University Erlangen-Nürnberg, Erlangen, Germany
January, 1991 Born in Sulzbach-Rosenberg, Germany

Research Projects

  • AdaptAC: Approximate Computing in FPGA-Based Image Processing
  • SecRec: Physical Security by Dynamic Hardware Reconfiguration

Research Interests

  • Reconfigurable Computing for Digital Signal Processing
  • Self-Adaptive Reconfigurable Systems
  • Approximate Computing
  • Intersection between Machine Learning and Computer Architecture
  • Deep Learning


WS 2017/2018
SS 2017

WS 2016/2017

Open Theses

Supervised Theses

  • FPGA-Oriented Approximation of Deep Convolutional Neural Networks by Means of Pruning Techniques
  • Simulation of Approximate Hardware for the Application in Computer Vision
  • Tailor-Made FPGA Implementations Using RapidSmith2
  • Automatic Generation of Implementation Variants of FPGA-Based Circuits by Means of RapidSmith2
  • Protection of FPGA-Based Cryptographic Implementations Against Fault Injection Attacks
  • On Switching Activity Minimization Using Approximate Computing Techniques to Reduce Dynamic Power Consumption in FPGAs







  • Pirkl  J.:
    Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics
    20th International Workshop on Software and Compilers for Embedded Systems (SCOPES’17), St. Goar, Germany, June 12, 2017.
    PDF: Download


  • Pirkl  J.:
    Hybrid Energy-Aware Reconfiguration Management on Xilinx Zynq SoCs
    International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancún, Mexico, December 2, 2016.
    PDF: Download