Navigation

---

orcid.org/0000-0002-3751-5273

Curriculum Vitæ

since 2015	Researcher at the Department of Computer Science 12 (Hardware/Software Co-Design), Friedrich-Alexander University Erlangen-Nürnberg
2013 − 2014	Exchange Student, Universitat Politècnica de València, Spain
2012 − 2014	M. Sc. Computer Science, National Institute of Astrophysics, Optics and Electronics, Mexico
2005 − 2010	B. Sc. Computer Science, Meritorious Autonomous University of Puebla, Mexico

Research Projects

• AConFPGA: Approximate Computing on FPGAs

Research Interests

• Embedded Systems
• Reconfigurable Architectures
• Approximate Computing

Other Interests

• IP Core Watermarking

Teaching

WS 2017/2018	Reconfigurable Computing
WS 2016/2017	Reconfigurable Computing
WS 2015/2016	Electronics of Programmable Digital Systems

Open Thesis

• Implementation and Analysis of a Sequential Approximate Multiplier

Supervised Theses

• Analysis and Implementation of an Approximate Kogge-Stone Adder on FPGA
• On Switching Activity Minimization Using Approximate Computing Techniques to Reduce Dynamic Power Consumption in FPGAs

Publications

2018

• Echavarria Gutiérrez JA., Wildermann S., Teich J.:
  Design Space Exploration of Multi-output Logic Function Approximations
  International Conference On Computer Aided Design (ICCAD 2018) (San Diego, CA, 11/05/18 - 11/08/18)
  BibTeX: Download
• Echavarria Gutiérrez JA., Schütz K., Becher A., Wildermann S., Teich J.:
  Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs
  AxC18: 3rd Workshop on Approximate Computing (Swissôtel Bremen, 05/31/18 - 06/01/18)
  BibTeX: Download

2017

• Echavarria Gutiérrez JA., Wildermann S., Potwigin E., Teich J.:
  Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders
  In: IEEE Embedded Systems Letters (2017), Art.Nr.: 99
  ISSN: 1943-0663
  DOI: 10.1109/LES.2017.2760922
  BibTeX: Download
• Pirkl J., Becher A., Echavarria Gutiérrez JA., Teich J., Wildermann S.:
  Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics
  20th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar, 06/12/17 - 06/13/17)
  DOI: 10.1145/3078659.3078669
  BibTeX: Download

2016

• Echavarria Gutiérrez JA., Wildermann S., Becher A., Teich J., Ziener D.:
  FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs
  International Conference on Field Programmable Technology (FPT 2016) (Xi'an, 12/07/16 - 12/09/16)
  DOI: 10.1109/FPT.2016.7929536
  BibTeX: Download
• Becher A., Echavarria Gutiérrez JA., Ziener D., Wildermann S., Teich J.:
  A LUT-Based Approximate Adder
  24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016). (Washington DC, 05/01/16 - 05/03/16)
  DOI: 10.1109/FCCM.2016.16
  BibTeX: Download

2015

• Echavarria Gutiérrez JA., Becher A., Teich J., Ziener D.:
  Approximate Adder Structures on FPGAs
  AxC15: 1st Workshop on Approximate Computing (Paderborn, Germany)
  BibTeX: Download

2014

• Echavarria Gutiérrez JA., Morales-Reyes A., Cumplido R., Salido MA.:
  FSM Merging and Reduction for IP Cores Watermarking using Genetic Algorithms
  2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig) (Cancun, 12/08/14 - 12/10/14)
  DOI: 10.1109/ReConFig.2014.7032525
  BibTeX: Download

Misc.

2018

• Talk: Design Space Exploration of Multi-output Logic Function Approximations
  International Conference On Computer Aided Design, (ICCAD), San Diego, CA, USA, November 05 – November 08, 2018.

• Talk: Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs
  Workshop on Approximate Computing, (AxC), Bremen, Germany, May 31 – June 01, 2018.

2016

• Talk: FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs
  International Conference on Field Programmable Technology, (FPT), Xi’an, China, December 07-09, 2016.
• Talk: A LUT-Based Approximate Adder
  24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Washington DC, USA, May 01-03, 2016.

2015

• Talk: Approximate Adder Structures on FPGAs
  Workshop on Approximate Computing, (AxC), Paderborn, Germany, October 15-16, 2015.

2014

• Talk: FSM Merging and Reduction for IP Cores Watermarking using Genetic Algorithms
  International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun, Mexico, December 08-10, 2014.