2020

• Qiao B., Reiche O., Özkan MA., Teich J., Hannig F.:
  Efficient Parallel Reduction on GPUs with Hipacc
  23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar, 25. Mai 2020 - 26. Mai 2020)
  In: Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2020
  DOI: 10.1145/3378678.3391885
  BibTeX: Download
• Qiao B., Özkan MA., Teich J., Hannig F.:
  The Best of Both Worlds: Combining CUDA Graph with an Image Processing DSL
  57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. Juli 2020 - 23. Juli 2020)
  In: Proceedings of the 57th Annual Design Automation Conference (DAC) 2020
  DOI: 10.1109/DAC18072.2020.9218531
  BibTeX: Download
• Özkan MA., Ok B., Qiao B., Teich J., Hannig F.:
  HipaccVX: Wedding of OpenVX and DSL-based Code Generation
  In: Journal of Real-Time Image Processing (2020)
  ISSN: 1861-8200
  DOI: 10.1007/s11554-020-01015-5
  URL: http://link.springer.com/article/10.1007/s11554-020-01015-5
  BibTeX: Download
• Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Leißa R., Hack S., Teich J., Hannig F.:
  AnyHLS: High-Level Synthesis with Partial Evaluation
  International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Hamburg, 20. September 2020 - 25. September 2020)
  URL: https://arxiv.org/pdf/2002.05796.pdf
  BibTeX: Download
• Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Leißa R., Hack S., Teich J., Hannig F.:
  AnyHLS: High-Level Synthesis with Partial Evaluation
  In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (2020), S. 3202-3214
  ISSN: 0278-0070
  DOI: 10.1109/TCAD.2020.3012172
  URL: https://arxiv.org/pdf/2002.05796.pdf
  BibTeX: Download

2019

• Özkan MA., Reiche O., Qiao B., Membarth R., Teich J., Hannig F.:
  Synthesizing High-Performance Image Processing Applications with Hipacc
  Demo at the University Booth at Design, Automation and Test in Europe (DATE) (Florence, 25. März 2019 - 29. März 2019)
  URL: https://www12.cs.fau.de/downloads/oezkan/publications/date-ubooth19.pdf
  BibTeX: Download
  (online publication)

2018

• Aydin F., Ugurdag HF., Leyent VE., Guzel AE., Annafianto NFR., Özkan MA., Akgun T., Erbas C.:
  Rapid Design of Real-Time Image Fusion on FPGA Using HLS and Other Techniques
  15th IEEE/ACS International Conference on Computer Systems and Applications (AICCSA) (Aqaba, 28. Oktober 2018 - 1. November 2018)
  In: 2018 IEEE/ACS 15TH INTERNATIONAL CONFERENCE ON COMPUTER SYSTEMS AND APPLICATIONS (AICCSA), NEW YORK: 2018
  BibTeX: Download
• Reiche O., Özkan MA., Hannig F., Teich J., Schmid M.:
  Loop Parallelization Techniques for FPGA Accelerator Synthesis
  In: Journal of Signal Processing Systems 90 (2018), S. 3-27
  ISSN: 1939-8115
  DOI: 10.1007/s11265-017-1229-7
  BibTeX: Download
• Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Teich J., Hannig F.:
  A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement
  International Workshop on FPGAs for Software Programmers (Dublin, 31. August 2018)
  In: Proceedings of the Fifth International Workshop on FPGAs for Software Programmers 2018
  URL: https://www12.cs.fau.de/downloads/oezkan/publications/fsp18.pdf
  BibTeX: Download

2017

• Reiche O., Özkan MA., Membarth R., Teich J., Hannig F.:
  Generating FPGA-based Image Processing Accelerators with Hipacc
  International Conference on Computer Aided Design (ICCAD) (Irvine, 13. November 2017 - 16. November 2017)
  In: Proceedings of the International Conference on Computer Aided Design (ICCAD) 2017
  DOI: 10.1109/ICCAD.2017.8203894
  BibTeX: Download
• Özkan MA., Reiche O., Hannig F., Teich J.:
  A Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis
  Fourth International Workshop on FPGAs for Software Programmers (FSP) (Ghent, 7. September 2017)
  In: Proceedings of the Fourth International Workshop on FPGAs for Software Programmers (FSP) 2017
  URL: https://ieeexplore.ieee.org/document/8084549
  BibTeX: Download
• Özkan MA., Reiche O., Hannig F., Teich J.:
  Hardware Design and Analysis of Efficient Loop Coarsening and Border Handling for Image Processing
  28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Seattle, 10. Juli 2017 - 12. Juli 2017)
  In: 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2017
  DOI: 10.1109/ASAP.2017.7995273
  URL: https://www12.cs.fau.de/downloads/oezkan/publications/asap17.pdf
  BibTeX: Download

2016

• Häublein K., Reichenbach M., Reiche O., Özkan MA., Fey D., Hannig F., Teich J.:
  Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures
  16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos, 18. Juni 2016 - 21. Juni 2016)
  In: Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2016
  DOI: 10.1109/SAMOS.2016.7818350
  BibTeX: Download
• Özkan MA., Reiche O., Hannig F., Teich J.:
  FPGA-Based Accelerator Design from a Domain-Specific Language
  26th International Conference on Field-Programmable Logic and Applications (FPL) (Lausanne, 29. August 2016 - 2. September 2016)
  In: Proceedings of the 26th International Conference on Field-Programmable Logic and Applications (FPL) 2016
  DOI: 10.1109/FPL.2016.7577357
  BibTeX: Download