Akif Özkan

Mehmet Akif Özkan, M. Sc.

Department Informatik (INF)
Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Raum 02.121
Cauerstr. 11
91058 Erlangen

Telefon: +49 9131 85-67306
Faxnummer: +49 9131 85-25149
E-Mail: akif.oezkan@fau.de
Webseite: https://www.cs12.tf.fau.de/person/akif-oezkan/

Curriculum Vitae

09-10.2017	Visiting Researcher, Computer Graphics Lab, Saarland University, Germany
since 2015	Researcher at the Department of Computer Science 12 (Hardware/Software Co-Design), Friedrich-Alexander University Erlangen-Nürnberg, Erlangen, Germany
2014 – 2015	Researcher, Department of EE, Özyegin University, Turkey
2012 – 2013	Exchange Student, KU Leuven, Belgium
2011 – 2014	M. Sc. in Electronics Engineering, Istanbul Technical University, Turkey
2007 – 2011	B. Sc. in Electronics Engineering, Istanbul Technical University, Turkey
July 1989	Born in Ankara, Turkey

Research Interests

Domain-Specific Languages
Digital Signal Processing on FPGAs
GPU Programming: CUDA, OpenCL
Image Processing

Open Source Projects

Hipacc	A DSL for Image Processing Applications
HipaccVX	Wedding of OpenVX and DSL-based Code Generation
AnyHLS	High-Level Synthesis with Partial Evaluation
AnyDSL	A Partial Evaluation Framework for Programming High-Performance Libraries

Teaching

SS 2019/2020	SystemC – Prototypisierung eingebetteter Systeme
WS 2019/2020	Praktikum: Entwicklung interaktiver eingebetteter Systeme (EES)
SS 2018/2019	SystemC – Prototypisierung eingebetteter Systeme
WS 2018/2019	Praktikum: Entwicklung interaktiver eingebetteter Systeme (EES)
SS 2017/2018	SystemC – Prototypisierung eingebetteter Systeme
WS 2017/2018	Praktikum: Entwicklung interaktiver eingebetteter Systeme (EES)
WS 2016/2017	Praktikum: Entwicklung interaktiver eingebetteter Systeme (EES)

Supervised Theses

Acceleration of 3D Stencil Applications Using High-Bandwidth Memory (HBM) on Alveo FPGAs and Vitis HLS
Efficient Implementation of Spiking Neural Networks on FPGAs by Combining DSPs and Approximate Computing
Approximate Computing and Multiplication Packing for Efficient Use of FPGA DSP Blocks
Development of an Embedded DSL for OpenVX
FPGA-based Image Processing Acceleration from Matlab/Simulink
Implementation of Convolutional Neural Networks using High-Level Synthesis
FPGA-based Image Processing with Hipacc

Professional Scientific Activities

Conference and Workshop Organization

Local Organizing Committee Member, BalkanCryptSec 2014 — International Conference on Cryptography and Information Security in the Balkans
Organizing Committee Member, GOMSIS 2012 — The 3rd Turkish Symposium on Embedded Systems and Its Applications

Talks

Publications

2021

Özkan MA., Ok B., Qiao B., Teich J., Hannig F.:
HipaccVX: Wedding of OpenVX and DSL-based Code Generation
In: Journal of Real-Time Image Processing 18 (2021), S. 765 - 777
ISSN: 1861-8200
DOI: 10.1007/s11554-020-01015-5
URL: http://link.springer.com/article/10.1007/s11554-020-01015-5
BibTeX: Download

2020

Qiao B., Reiche O., Özkan MA., Teich J., Hannig F.:
Efficient Parallel Reduction on GPUs with Hipacc
23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (Sankt Goar, 25. Mai 2020 - 26. Mai 2020)
In: Proceedings of the 23rd International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2020
DOI: 10.1145/3378678.3391885
BibTeX: Download
Qiao B., Özkan MA., Teich J., Hannig F.:
The Best of Both Worlds: Combining CUDA Graph with an Image Processing DSL
57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. Juli 2020 - 23. Juli 2020)
In: Proceedings of the 57th Annual Design Automation Conference (DAC) 2020
DOI: 10.1109/DAC18072.2020.9218531
BibTeX: Download
Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Leißa R., Hack S., Teich J., Hannig F.:
AnyHLS: High-Level Synthesis with Partial Evaluation
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Hamburg, 20. September 2020 - 25. September 2020)
URL: https://arxiv.org/pdf/2002.05796.pdf
BibTeX: Download
Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Leißa R., Hack S., Teich J., Hannig F.:
AnyHLS: High-Level Synthesis with Partial Evaluation
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (2020), S. 3202-3214
ISSN: 0278-0070
DOI: 10.1109/TCAD.2020.3012172
URL: https://arxiv.org/pdf/2002.05796.pdf
BibTeX: Download

2019

Özkan MA., Reiche O., Qiao B., Membarth R., Teich J., Hannig F.:
Synthesizing High-Performance Image Processing Applications with Hipacc
Demo at the University Booth at Design, Automation and Test in Europe (DATE) (Florence, 25. März 2019 - 29. März 2019)
URL: https://www12.cs.fau.de/downloads/oezkan/publications/date-ubooth19.pdf
BibTeX: Download
(online publication)

2018

Aydin F., Ugurdag HF., Leyent VE., Guzel AE., Annafianto NFR., Özkan MA., Akgun T., Erbas C.:
Rapid Design of Real-Time Image Fusion on FPGA Using HLS and Other Techniques
15th IEEE/ACS International Conference on Computer Systems and Applications (AICCSA) (Aqaba, 28. Oktober 2018 - 1. November 2018)
In: 2018 IEEE/ACS 15TH INTERNATIONAL CONFERENCE ON COMPUTER SYSTEMS AND APPLICATIONS (AICCSA), NEW YORK: 2018
BibTeX: Download
Reiche O., Özkan MA., Hannig F., Teich J., Schmid M.:
Loop Parallelization Techniques for FPGA Accelerator Synthesis
In: Journal of Signal Processing Systems 90 (2018), S. 3-27
ISSN: 1939-8115
DOI: 10.1007/s11265-017-1229-7
BibTeX: Download
Özkan MA., Pérard-Gayot A., Membarth R., Slusallek P., Teich J., Hannig F.:
A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement
International Workshop on FPGAs for Software Programmers (Dublin, 31. August 2018)
In: Proceedings of the Fifth International Workshop on FPGAs for Software Programmers 2018
URL: https://www12.cs.fau.de/downloads/oezkan/publications/fsp18.pdf
BibTeX: Download

2017

Reiche O., Özkan MA., Membarth R., Teich J., Hannig F.:
Generating FPGA-based Image Processing Accelerators with Hipacc
International Conference on Computer Aided Design (ICCAD) (Irvine, 13. November 2017 - 16. November 2017)
In: Proceedings of the International Conference on Computer Aided Design (ICCAD) 2017
DOI: 10.1109/ICCAD.2017.8203894
BibTeX: Download
Özkan MA., Reiche O., Hannig F., Teich J.:
A Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis
Fourth International Workshop on FPGAs for Software Programmers (FSP) (Ghent, 7. September 2017)
In: Proceedings of the Fourth International Workshop on FPGAs for Software Programmers (FSP) 2017
URL: https://ieeexplore.ieee.org/document/8084549
BibTeX: Download
Özkan MA., Reiche O., Hannig F., Teich J.:
Hardware Design and Analysis of Efficient Loop Coarsening and Border Handling for Image Processing
28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) (Seattle, 10. Juli 2017 - 12. Juli 2017)
In: 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) 2017
DOI: 10.1109/ASAP.2017.7995273
URL: https://www12.cs.fau.de/downloads/oezkan/publications/asap17.pdf
BibTeX: Download

2016

Häublein K., Reichenbach M., Reiche O., Özkan MA., Fey D., Hannig F., Teich J.:
Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures
16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos, 18. Juni 2016 - 21. Juni 2016)
In: Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2016
DOI: 10.1109/SAMOS.2016.7818350
BibTeX: Download
Özkan MA., Reiche O., Hannig F., Teich J.:
FPGA-Based Accelerator Design from a Domain-Specific Language
26th International Conference on Field-Programmable Logic and Applications (FPL) (Lausanne, 29. August 2016 - 2. September 2016)
In: Proceedings of the 26th International Conference on Field-Programmable Logic and Applications (FPL) 2016
DOI: 10.1109/FPL.2016.7577357
BibTeX: Download

M.Sc. and B.Sc.

Tosun M., Özkan MA., Guzel AE., Ugurdag HF.:
Fast one- and two-pick fixed-priority selection and muxing circuits
IEEE East-West Design & Test Symposium (EWDTS) (Yerevan, 14/10/16 – 17/10/16)
URL: https://www.researchgate.net/publication/308415294_Fast_One-_and_Two-Pick_Fixed-Priority_Selection_and_Muxing_Circuit
Özkan MA., Ors B.:
Data transmission via GSM voice channel for end-to-end security
IEEE International Conference on Consumer Electronics – Berlin (ICCE-Berlin) (Berlin, 06/09/15 – 09/09/15)
URL: https://www.researchgate.net/publication/304296823_Data_transmission_via_GSM_voice_channel_for_end_to_end_security
Özkan MA., Herrewege AV., Verbauwhede I., Ors B.:
Implementation of a Lightweight Trusted Platform Module
WIC/IEEE Symposium on Information Theory and Signal Processing in the Benelux (Leuven, 30/05/13 – 31/05/13)
URL: http://toc.proceedings.com/18816webtoc.pdf
Özkan MA., Ors B., Saldamli G.:
Secure voice communication via GSM network
26th IEEE International Conference on Electrical and Electronics Engineering (ELECO) (Bursa, 01/12/11 – 04/12/11)
URL: https://www.researchgate.net/publication/254048360_Secure_voice_communication_via_GSM_network

Thesis

Özkan MA.: Implementation of a Lightweight Trusted Platform Module,
M.Sc. Thesis, Istanbul Technical University, May 2014
Özkan MA.: Secure voice communication via GSM network (Turkish),
B.Sc. Thesis, Istanbul Technical University, May 2011