14.08.2015: Vortrag: „Dataflow based Design and Implementation for Multicore Digital Signal Processors“, Prof. Dr. Shuvra S. Bhattacharyya
Im Rahmen des Seminars SFB/TRR 89 „InvasIC“ hielt am 14.08.2015 Herr Prof. Dr. Shuvra S. Bhattacharyya von der University of Maryland den Vortrag „Dataflow based Design and Implementation for Multicore Digital Signal Processors“.
Abstract:
In recent years, we have been seeing increased hardware and software support for dataflow programming incorporated into multicore digital signal processors
(MDSPs) and their design environments. Key application areas for such technology include wireless communications, embedded computer vision, and financial
signal processing. In this talk, I will discuss challenges in optimized mapping of signal processing dataflow graphs onto state--of--the--art MDSPs, and I will
review a number of powerful techniques for dataflow modeling and scheduling that have been developed in recent years to address these challenges. I will conclude
with a discussion on emerging trends in the design and implementation of MDSP--based signal processing systems.
